Adaptive Extreme Edge Computing for Wearable Devices
Erika Covi, Elisa Donati, Hadi Heidari, David Kappel, Xiangpeng Liang, Melika Payvand, Wei Wang
AAdaptive Extreme Edge Computing for WearableDevices
Erika Covi , Elisa Donati , Hadi Heidari , David Kappel , Xiangpeng Liang , MelikaPayvand , and Wei Wang NaMLab gGmbH, N ¨othnitzer Strasse 64 a, 01187 Dresden, Germany Institute of Neuroinformatics, University of Zurich and ETH Zurich, Switzerland Microelectronics Lab (meLAB), James Watt School of Engineering, University of Glasgow, G12 8QQ, UK Bernstein Center for Computational Neuroscience, III Physikalisches Institut - Biophysik, Georg-August Universit ¨at,G ¨ottingen, Germany The Andrew and Erna Viterbi Department of Electrical Engineering, Technion - Israel Institute of Technology, Haifa32000, Israel,Formerly with Dipartimento di Elettronica, Informazione e Bioingegneria (DEIB), Politecnico di Milanoand IU.NET, Milan, Italy * All authors contributed equally to this work
ABSTRACT
Wearable devices are a fast-growing technology with impact on personal healthcare for both society and economy. Due to thewidespread of sensors in pervasive and distributed networks, power consumption, processing speed, and system adaptationare vital in future smart wearable devices. The visioning and forecasting of how to bring computation to the edge in smartsensors have already begun, with an aspiration to provide adaptive extreme edge computing. Here, we provide a holisticview of hardware and theoretical solutions towards smart wearable devices that can provide guidance to research in thispervasive computing era. We propose various solutions for biologically plausible models for continual learning in neuromorphiccomputing technologies for wearable sensors. To envision this concept, we provide a systematic outline in which prospectivelow power and low latency scenarios of wearable sensors in neuromorphic platforms are expected. We successively describevital potential landscapes of neuromorphic processors exploiting complementary metal-oxide semiconductors (CMOS) andemerging memory technologies (e.g. memristive devices). Furthermore, we evaluate the requirements for edge computingwithin wearable devices in terms of footprint, power consumption, latency, and data size. We additionally investigate thechallenges beyond neuromorphic computing hardware, algorithms and devices that could impede enhancement of adaptiveedge computing in smart wearable devices.
Keywords:
Neuromorphic computing, Edge computing, Wearable devices, Learning algorithms, Memristive devices
Wearable devices can monitor various human body symptoms ranging from heart, respiration, movement, to brain activities.Such miniaturized devices using different sensors can detect, predict, and analyze the physical performance, physiological status,biochemical composition, and mental alertness of the human body. Despite advances in novel materials that can improve theresolution and sensitivity of sensors, modern wearable devices are facing various challenges such as low computing capability,high power consumption, high amount of data to be transmitted, and low speed of the data transmission. Conventional wearablesensing solutions mostly transmit the collected data to external servers for off-chip computing and processing. This approachtypically creates an information bottleneck acting as one of the major limiting factors in lowering the power consumptionand improving the speed of the operation of the sensing systems. In addition, the use of conventional remote servers withconventional signal processing techniques for processing these temporal real-time sensing data makes it computationallyintensive and results in significant power consumption and hardware occupation. Moreover, standard von-Neumann architecturesfeature a physical separation between memory and processing unit, thus further increasing the power consumption to shuttledata between units. Such solutions always need a trade-off between power lifetime and computing capability. Bringingcomputing at the edge enables faster response times and opens the possibility of personalized always-on wearable devices ablefor continuously interacting and learning with the environment. However, a radical change of paradigm which uses innovativealgorithms, circuits and memory devices is needed to maximize the system performance whilst keeping power and memorybudgets at a minimum.Conventional computers, using Boolean and bit-precise digital representations and executing operations with time-1 a r X i v : . [ c s . ET ] D ec ultiplexed and clocked signal, are not optimized for fuzzy inputs and complex cognitive tasks such as pattern recognition,time series prediction, and decision making. Deep Artificial Neural Networks (ANNs) on the other hand have demonstratedamazing results in a wide range of pattern recognition tasks including machine vision, Natural Language Processing (NLP), andspeech recognition . Dedicated hardware ANN accelerators, including Graphical Processing Units (GPUs), Tensor ProcessingUnits (TPUs), and custom Application Specific Integrated Circuits (ASICs) with parallel architectures are being developed toexecute these algorithms and obtain high accuracy inference results. GPUs provide a substrate for parallel processing nature ofthe ANNs and thanks to its very long memory bus it is perfect for running Vector Matrix Multiplications (VMMs) which are atthe core of the processing in deep neural networks. Therefore, GPUs support the parallelism whose massive version exists inthe brains for cognitive purposes, but they consume orders of magnitude more power than that of the brain , since they areclocked and the memory access is not localized. To solve this problem, ASIC accelerators try to reduce the complexity of thestructure by making the system more application specific and using clock gating and specific hardware structure which matchesbest to the structure of the mapped neural network to reduce power consumption through less memory read and data access .To go even further in power savings, there are two problems to be solved: (i) remove clock and (ii) perform computationwith co-localization of memory and processor. The first problem calls for the development of event-based systems, whereprocessing is performed “asynchronously", i.e. only when there are input “events". The algorithmic basis for this kind of“asynchronous" processing is Spiking Neural Network (SNN), in which neurons spike asynchronously only to communicateinformation to each other.To avoid the data movement between the memory and the processor, the memory element should be not only used tostore data but also to perform computation inside the processor. This approach is called “in-memory computing". These twoapproaches of (i) event-based systems and (ii) in-memory computing, together with (iii) massive parallelism, are the threefundamental principles which have led to the development of neuromorphic computing, and to the realization of highly efficientneuromorphic platforms . Therefore, in this article, we will refer to event-based highly parallel systems that are able toperform real-time sensory processing.Despite that current fully Complementary Metal-Oxide-Semiconductor (CMOS) implementations of neuromorphic plat-forms have shown remarkable performance in terms of power efficiency and classification accuracy, there are still somebottlenecks hindering the design of embedded sensing and processing systems. First, the memory used is typically StaticRandom Access Memory (SRAM), which has very low static power consumption, but it is a large element (6 transistors percell) and it is volatile. The latter feature implies that the information about the network configuration has to be stored elsewhereand transferred to the system at its startup. For large networks, it may take tens of minutes before the system is ready for normaloperation. Second, always-on adaptive systems need to work with time constants that have the same time-span of the taskthat is being learned (e.g. longer than seconds). Implementing such long time constants in neuromorphic CMOS circuits isimpractical, since it requires large area capacitors.To overcome the limitations of fully CMOS-based approaches, the intrinsic unique physical properties of emergingmemristive devices can be exploited for both long-term (non-volatile) weight storage and short-term (volatile) task-relevanttimescales. In particular, non-volatile devices feature retention times on a long time scale ( >
10 years, ) while showingweight reconfigurability with voltages compatible with typical CMOS circuits ( ≤ ), thus being able to emulate biological time constants.This non-volatile / volatile property of memristive devices, together with a small footprint and power efficiency, has indeedattracted a lot of interest in the last ten years . However, memristive technology has to be supported by ad hoc theoreticallysound biologically plausible algorithms enabling continual learning and capable to exploit the intrinsic physical properties ofmemristive devices, such as stochasticity, to achieve accuracy performance comparable to state-of-the-art ANN whilst reducingthe power consumption.This review discusses the challenges to undertake for designing extreme edge computing wearable devices in four differentcategories: (i) the state-of-the-art wearable sensors and main restrictions towards low-power and high performance learningcapabilities; (ii) different algorithms for modeling biologically plausible continual learning; (iii) CMOS-based neuromorphicprocessors and signal processing techniques enabling low-power local edge computing strategies; (iv) emerging memristivedevices for more efficient and scalable embedded intelligent systems. As graphically summarized in Fig. 1, we argue that aholistic approach which combines and exploits all the strengths of these four categories in a co-designed system is the keyfactor enabling future generations of smart sensing systems. Sensors act as the information collector of a machine or a system that can respond to its physical ambient environment. Theyare able to translate a specific type of information from a physical environment such as the human body to an electrical signal( ). For collecting the information from the human body environment, wearable versions of the machine or the system, i.e.wearable devices, would be of great convenient and helpful. Wearable devices require miniaturize, flexible, and highly sensitive igure 1. A graphical overview of adaptive edge computing in wearable biomedical devices. The figure shows the pathwayfrom wearable sensors to their application through intelligent learning.sensors to capture clear information from the body. However, from processing aspect and to make a signal meaningful towardspersonalized devices, further development is still needed.Due to the fact that the sensing signal is relatively weak and noisy, a readout circuit (normally composed by an amplifier, aconditioning circuit and an analogue signal processing unit) is necessary to make the signal readable for a system ( ). Thesubsequent high-level system will process the data and send commands to actuators for a closed-loop control or interaction( ). For various applications ranging from the human-machine interface ( ) to health monitoring ( ), differentcombinations of sensor and system have been developed over the past decade ( ). The use of machine learning empowerssensor to build a novel smart application. The examples will be provided in the next section. Recently, the field of artificial intelligence further boosts the possibility of smart wearable sensory systems. The emergingintelligent applications and high-performance systems require more complexity and demand sensory units accurately describethe physical object. The decision-making unit or algorithm can therefore output a more reliable result ( ). Depending on thesignal acquiring position, Fig. 1 summaries the four biopotential sensors and two widely used wearable sensors along with theirlearning systems and applications. The sensors for the biopotential will be introduced first, and the other two wearable sensorswill be provided separately.The biopotential signal can be extracted from the human body using a sensor with direct electrode contact. The electrochem-ical activity of the cells in nervous, muscular and glandular tissue generates ionic currents in the body. An electrode-electrolytetransducer is needed to convert the ionic current to electric current for the front-end circuit. The electrode that is normallymade up of mental can be oxidized by the electrolyte, generating metal ions and free electrons. In addition, the anions inthe electrolyte can also be oxidized to neutral atoms and free electrons. These free electrons result in current flow throughthe electrode. Thus, the surface potential generated by the electrochemical activities in cells can be sensed by the electrode.However, the bio-signals sensed by the electrode are weak and noisy. Before digitizing the collected signals by analog-to-digitalconverter, an analogue front-end is essential to provide a readable signal. The design requirements of the front-end for thebiopotential electrodes can be summarized as follow: i) high common mode rejection ratio; ii) high signal-to-noise-ratio; iii)low-power consumption; iv) signal filtering, and v) configurable gain ( ). Electrocardiography (ECG).
ECG is the electrical activity generated by the electrochemistry around cardiac tissue.Containing morphological or statistical features, ECG provides comprehensive information for analyzing and diagnosingcardiovascular diseases ( ). In the previous study, automatic ECG classification has been achieved using machine learningalgorithms, such as Deep Neural Network (DNN) ( ), Support Vector Machine (SVM) ( ), and Recurrent NeuralNetwork (RNN) ( ). According to Association for the Advancement of Medical Instrumentation, there are five classesof ECG type of interest: normal, ventricular, supraventricular, fusion of normal and ventricular, and unknown beats. Thesemethodologies can be evaluated by available ECG database and yield over 90% accuracy and sensitivity for the five classes,which is essential for future cardiovascular health monitoring. In wearable application, and present systems that measureECG and send it to the cloud for classification and health monitoring. lectroencephalography (EEG). Our brain neurons communicate with each other through electrical impulses. An EEGelectrode can help to detect potential information associated with this activity through investigating EEG ( ) in the surfaceof the skull. In comparison with other biopotential signals, surface EEG is relatively weak (normally in the range of microvolt-level) and noisy ( ). Therefore, it requires high input impedance readout circuit and intensive signal pre-processing for cleanEEG data ( ). While wet-electrode (Ag/AgCl) is more precise and more suitable for clinical purpose, passive dry-electrodeis more suitable for daily health monitoring and brain-machine interface ( ). Besides, the applications also include mentaldisorder ( ), driving safety ( ), and emotion evaluation ( ). A commercial biopotential data acquisition system, BiosemiActive Two, provides up to 256 channels for EEG analysis ( ). For a specific application, we can reduce the number ofelectrodes to only detect the relevant areas, such as 19 channels for depression diagnosis ( ), four channels for evaluatingdriver vigilance ( ) and 64 channels for emotional state classification ( ). Although EEG is on-body biopotential, most of theexisting EEG researches employed offline learning and analysis because of the system complexity and the high number ofchannels. In wearable real-time applications, usually a smaller number of channels were selected and the data were wirelesslysent to cloud for further processing ( ). Electrooculography (EOG).
The eye movement, which results in potential variations around eyes as EOG, is a combinedeffect of environmental and psychological changes. It returns relatively weak voltage (0.01-0.1mV) and low frequency (0-10Hz)( ). Differ from other eye tracking techniques using a video camera and infrared, EOG provides a lightweight, inexpensive andfully wearable solution to access human’s eye movement ( ). It is the most widely used approach of wearable human-machineinterface, especially for assisting quadriplegics ( ). It has been used to control a wheelchair ( ), control a prosthesis limb( ),( ) evaluate sleeping ( ). Additionally, recent studies fuse EEG and EOG to increase the degree of freedom of signaland enhance the system reliability because their similar implicit information such as sleepiness ( ) and mental health ( ).EOG can also act as a supplement to provide additional functions or commands to an EEG system ( ). Electromyography (EMG).
EMG is an electrodiagnostic method for recording and analyzing the electrical activitygenerated by skeletal muscles. EMG is generated by skeletal muscle movement, which frequently occurs in arms and legs. Ityields higher amplitude (up to 10 millivolts) and bandwidth (20-1000Hz) compared to the other biopotentials ( ). Nearthe active muscle, different oscillation signals can be measured by a dry electrode array, which allows the computer to senseand decode body motion ( ). A prime example is the Myo armband of Thalmic Labs, which is a commercial multi-sensordevice that consists of EMG sensors, gyroscope, accelerometer and magnetometer ( ). The sensory data is sent to phone or PCvia Bluetooth, at which various body movements can be obtained by feature extraction and machine learning. Moreover, theapplication of EMG is frequently linked to target control like a wheelchair ( ) and prosthetic hand ( ) for assisting disabledpeople. In addition, its application also includes sign language recognition ( ), diagnosis of neuromuscular disorders ( ),analysis of walking strides ( ) and virtual reality ( ). Machine learning enables the system to overcome the variation of EMGsignals from different users ( ). Photoplethysmography (PPG).
PPG is an non-invasive and low-cost optical measurement method that is often used forblood pressure and heart rate monitoring in wearable devices. The optical properties in skin and tissue are periodically changesdue to the blood flow driven by the heartbeat. By using a light emitter toward the skin surface, the photosensor can detect thevariations in light absorption normally from wrist or finger. This variation signal is called PPG which is highly relevant to therhythm of the cardiovascular system ( ). Compared with ECG, PPG is easily accessible and low cost, which makes it an idealintermedia of wearable heart rate measurement. The main disadvantage against ECG is that the PPG is not unique for differentpersons and body positions. Thus, further analysis of PPG requires machine learning or other statistics tools for calibratingthe signal to different scenarios. For example, it can be used in biometric identification after deep learning ( ). It is worthmentioning that PPG is a strong supplementary in the application of ECG. Bioimpedance spectroscopy (BIS).
BIS is another low-cost and powerful sensing technique that provides informative bodyparameters. The principle is that cell membrane behaves like a frequency-dependent capacitor and impedance. The emitterelectrodes generate multifrequency excitation signal (0.1-100MHz) on the skin while the receiver electrodes collect thesecurrent for demodulating the impedance spectral data of the tissue in between ( ). Compared to homogeneous materials,body tissue presents more complicated impedance spectra because of the cell membranes and macromolecules. Therefore,the tissue conditions, such as muscle concentration, structural and chemical composition, can be analysed through BIS. TheBIS can measure body composition such as fat and water ( ). Based on the different setup in terms of position and frequency,it can also be helpful in the early detection of diseases such as lymphedema, organ ischemia and cancer ( ). Furthermore,multiple pair-wise electrodes can form electrical impedance tomography that describes impedance distribution. By embeddingthese electrodes in a wristband, the tomography can estimate hand gesture after training, which is another novel solution ofinexpensive human-machine interface ( ). .2 Multisensory fusion in wearable devices Every sensor has its own limitation. In some demanding cases, an individual sensor itself cannot satisfy the system requirementsuch as accuracy or robustness ( ). The solution involves increasing the number and type of sensors to form a multisensorysystem or sensor network for one measurement purpose( ). Multiple types of sensor synergistically working in a systemprovide more dimensions of input to fully map an object onto the data stream. Different sensors return different data with respectto sampling rate, number of input and the information behind the data. Machine learning models, such as ANN and SVM,can be designed to combine multiple sources of data. Depended on the application, sensor types and data structure, severalapproaches have been proposed for multisensory fusion. Generally, in such a system, machine learning is frequently used andplays an vital role in merging different sources of sensory data based on its multidimensional data processing mechanism. Themachine learning algorithms allow sensory fusion occurs at the signal, feature or decision level( ). The results showed thata multisensory system is advantageous in improving system performance. For example, the fusion of ECG and PPG pattern canbe an informative physiological parameter for robust medical assessment ( ). Counting the peak intervals between PPG andECG can estimate the arterial blood pressure ( ). Interestingly, a recent study shows that the QRS complex of ECG can bereconstructed from PPG by a novel transformed attentional neural networks after training ( ). This could be beneficial for theaccessibility of wearable ECG. Given the potential of the sensory system with machine learning, the main challenge raised is the shortage of power andcomputing efficient ( ). The novel applications using multiple sensors and high learning ability usually require more energy inthe wearable computing unit ( ). Nevertheless, the power supply in the wearable domain is a difficulty with existing batterytechnologies. This weakness limits the further development of smart wearable device ( ). The existing solution is to wirelesslytransfer the raw data onto a cloud where the computationally intensive algorithm is implemented ( ). However, this solution isnot ideal considering 1) the complexity of using a wireless module, 2) the non-negligible power consumption, 3) the amountof data, 4) the space limitation due to the range of wireless transmission, 5) privacy issues due to the broadcast of signals, 6)non-negligible time latency due to communication channel. These drawbacks strongly limit the application of wearable sensors.Implementation of ANN in von Neumann architectures, which has been frequently used in sensors, is power-hungry.Conversely, it has been reported that signal processing activity in the brain is several orders of magnitudes more power-efficientand one order in processing rate better than digital systems ( ). Compared to conventional approaches based on a binary digitalsystem, brain-inspired neuromorphic hardware yet to be advanced in the contexts of data storage and removal as well as theirtransmission between different units. In this perspective, a neuromorphic chip with a built-in intelligent algorithm can act as afront-end processor next to the sensor. The conventional Analog to Digital Converters (ADCs) could be replaced by a deltaencoder or feature extractor converting the sensor analog output to spike-based signal for the hardware (see Section 4). In theend, the output becomes the result of recognition or prediction instead of an intensive data stream. In this way, the computationoccurs at the local edge under low power and brain-like architecture. In this section we will highlight some recently introduced methods to port the power of modern machine learning to neuro-morphic edge devices. In the last couple of years, machine learning has made big steps forward reaching close-to humanperformance on a wide range of tasks. Many of the most successful machine learning methods are based on artificial neuralnetworks (ANN), which are inspired by the organization of information processing in the brain. However – somewhat contradic-tory – mapping modern ANN learning methods to brain-inspired hardware poses considerable challenges to the algorithm andhardware design. The main reason for this is, that the development of machine learning algorithms has been strongly influencedby the development of powerful mainframe computers that perform learning offline in big server farms only eventually sendingback results to the user. While this development has paved the ground for today’s success of ANNs, it has also lead the fieldaway from following the principles used in biology for efficient learning. In the following Section 3.1 we will review recentapproaches to combine the strengths of modern machine learning and brain-inspired algorithms, that are of particular interestfor edge computing applications. In Section 3.2 we will focus on the problem to cope with extreme memory constraints byexploiting sparsity. In Section 3.3 we will highlight additional open challenges and future work.
Today, the dominating method for training artificial neural networks is the error backpropagation (Backprop) algorithm ,which provides an efficient and scalable solution to adapting the network parameters to a set of training data. Backprop is igure 2.
Biologically inspired models of learning in spiking neural networks (a) The e-prop algorithm approximatesback-propagation through time using random feedback to propagate error signals to synapses of a recurrent SNN (adaptedfrom ) (b) Synaptic sampling exploits the variability of learning rules and redundancy in the task solution space to learnsparse and robust network configurations (adapted from ) (c) Overcoming forgetting by selectively slowing down weightchanges . After learning a first task A, parameter distributions are absorbed into a prior distribution that confines the motilityof synaptic weights in subsequent tasks (task B). n iterative, gradient-based, supervised learning algorithm that operates in three phases. First, a given input activation ispropagated through the network to generate the output based on the current set of parameters. Then, the mismatch betweenthe generated outputs and target values is computed using a loss function, and propagated backwards through the networkarchitecture to compute suitable weight changes. Finally, the network parameters are updated to reduce the loss. We will notgo into the details behind Backprop here, but see for an excellent review and historical survey of the development of thealgorithm. The problem of porting Backprop to neuromorphic hardware stems form a well-known shortcoming of the algorithmknown as locking – the weights of a network can only be updated after a full forwards propagation of the data through thenetwork, followed by loss evaluation, then finally after waiting for the back-propagation of error gradients . Locking preventsan efficient implementation of Backprop on online distributed architectures. Also, Backprop is not well suited for spikingneural networks which have non-differentiable output functions. These problems have been recently addressed in brain-inspiredvariants of the Backprop algorithm. In recent years a number of methods have been proposed to approximate the gradient computation performed by Backprop inorder to prevent locking (see for a recent review). proposed to replace the non-local error back-propagating term ofthe Backprop algorithm by sending the loss through a fixed feedback network with random weights that are excluded fromtraining. In this approach, named random feedback alignment the back-propagating error signal acts as a local feedback to eachsynapse, similar to a reward signal in reinforcement learning. The fixed random feedback network de-correlates the error signalsproviding individual feedback to each synapse. Lillicrap et al. could show that this simple approach already provides a viableapproximation to the exact Backprop algorithm and performs well for practical machine learning problems of moderate size.In an event-based version of random feedback alignment, that is well suitable for neuromorphic hardware, was introduced.This approach was further generalized in to include a larger class of algorithms that use error feedback signals.An efficient model for learning complex sequences in spiking neural networks, named
Superspike , was introduced in .The model also uses a learning rule that is modulated by error feedback signals and locally minimizes the mismatch betweenthe network output and a target spike train. To overcome the problem of non-differentiable output, Superspike uses a surrogategradient approach that replaces the infinitely steep spike events with a finite auxiliary function at the time points of networkspike events . As in random feedback alignment, learning signals are communicated to the synapses via a feedbacknetwork with fixed weights. Using this approach Zenke and others could demonstrate efficient learning of complex sequencesin spiking networks.Another approach to approximate Backprop in spiking neural networks uses an anatomical detail of Cortical neurons. introduced a biologically inspired two-compartment neuron model that approximates the error backpropagation algorithmby minimizing a local dendritic prediction error. port learning by Backprop to neuromorphic hardware by incorporatingdynamics with finite time constants and by optimizing the backward pass with respect to substrate variability. They demonstratethe algorithm on the BrainScaleS analog neuromorphic architecture.
Recurrent neural network (RNN) architectures often show superior learning results for tasks that involve a temporal dimension,which is often the case for edge computing applications. Porting learning algorithms for RNNs is therefore of utmost importancefor efficient machine learning on the edge. Backpropagation through time (BPTT) – the standard RNN learning method used inmost GPU implementations – unfolds the network in time and keep this extended structure in memory to propagate informationforward and backward which poses a severe challenge to the power and area constraints of edge computing. Recent theoreticalresults show that the power of BPTT can be brought to biologically inspired spiking neural networks (SNN) while at thesame time the unfolding can be prevented in an approximation that operates only forward in time, enabling online, always-on learning. This algorithm operates at every synapse in parallel and incrementally updates the synaptic weights. As for randomfeedback alignment and Superspike discussed above, the weight update depends only on three factors, where the first two aredetermined by the states of the two related input/output neurons, and the third is given by synapse-specific feedback conveyingthe mismatch between the target and the actual output (see Fig. 2a for an illustration). The temporal gap between these factorsis mitigated by an eligibility trace describing a transient dynamic. Eligibility traces, have been theoretically predicted for a longtime , and have also recently been observed experimentally in the brain . .2 Efficient learning under stringent memory constraints The amount of available resources in neuromorphic systems is kept low to increase energy efficiency. Memory elements areespecially impactful on the energy budget. Therefore, algorithms are needed that make efficient use of the available memoryresources. The largest amount of memory in a network is usually consumed by the synaptic weights. Since in practice, theweights of many connections in a network converge to values close to zero, several methods have been proposed to reducethe memory footprint of machine learning algorithms by exploiting sparsity in the network connectivity. We will discuss heretwo types of algorithms: (1) those that are based on pruning connections after learning and (2) online learning with sparse networks. These two types of sparse learning algorithms are discussed in the following sections.
Many approaches to exploit sparsity in learning algorithms focus on pruning the network after training (see for a recentreview). Simple methods rely on pruning by magnitude, simply by eliminating the weakest (closest to zero) weights in thenetwork . Some methods based on this idea have reported impressive sparsity rates of over 95% for standard machinelearning benchmarks with negligible performance loss . Other methods are based on theoretical motivations and classicalsparsification and regularization techniques . These models reach high compression rates. proposed a method toiteratively grow and prune a network in order to generate a compact yet precise solution. They provide a detailed compari-son with state of the art dense networks and other pruning methods and reaching sparsity above 99% for the LeNet-5 benchmark.
A number of authors also introduced methods that work directly with sparse networks during training, which is often themore interesting case for neuromorphic applications with online training. introduced an algorithm for online stochasticrewiring in deep neural networks that works with a fixed number of synaptic connections throughout learning. The algorithmshowed close-to state of the art performance at up to 98% sparsity. Sparse evolutionary training (SET) introduced a heuristicapproach that prunes the smallest weights and regrows new weights in random locations. Dynamic Sparse Reparameterization introduces a prune-redistribute-regrowth cycle. They demonstrated compelling performance levels also for very deep neuralnetwork architectures. introduced a single shot pruning algorithm that yields sparse networks based on a saliency criterionprior to the actual training. introduced a refined method for online pruning and redistribution that surpasses the previousmethods in terms of sparsity and learning performance.
As outlined above, edge computing poses quite specific challenges to learning algorithms that are substantially differentfrom requirements of classical applications. Some of the algorithms outlined above have already been succesfully ported toneuromorphic hardware. For example, the e-prop algorithm of has been implemented on the SpiNNaker 2 chip yielding anadditional energy reduction by two orders of magnitude compared to a X86 implementation . See the next Section 4 for moredetails on available neuromorphic hardware and their applications.In the remainder of this section we will highlight open challenges that remain to be solved for efficient learning in edgecomputing applications. In addition to the stringent memory and power constraints learning at the edge also has to function inan online scenario where data arrive in a continuous stream. Some dedicated hardware resources, e.g. like memristive devicesdiscussed in Section 5, may also show high levels in intrinsic variability, so the learning algorithm should be robust againstthese noise sources. In this section we discuss recent advances in this line of research and provide food for thought on howthese specific challenges can be approached in future work.
Here we review recent advances in using inspiration from biology to make learning algorithms robust against device variability.Several authors have suggested that device noise and variability should not be seen as a nuisance, but rather can serve as acomputational resource for network simulation and learning algorithms (see for a thorough discussion). have shownthat variability in neuronal outputs can be exploited to learn complex statistical dependencies between sensory stimuli. Thestochastic behavior of the neurons is used in this model to compute probabilistic inference, while biologically motivatedlearning rules, that only require local information at the synapses can be used to update the synaptic weights. A theoreticalfoundation of the model shows that the spiking network performs a Markov chain Monte Carlo sampling process, that allowsthe network to ’reason’ about statistical problems.This idea is taken one step further in by showing that also the variability of synaptic transmission can be used forstochastic computing. The intrinsic noise of synaptic release is used to drive a sampling process. It was shown that this modelcan be implemented in an event-based fashion and was benchmarked on the MNIST digit classification task, where it achieved .
6% accuracy. In it was shown that the variability of learning rules and weight parameters gives rise to a biologicallyplausible model of online learning. The intrinsic noise of synaptic weight changes drives a sampling process that can be usedto exploit redundancies in the task solution space (see Fig. 2b for an illustration). This model was applied to unsupervisedlearning in spiking neural networks, and to closed-loop reinforcement learning problems . In this model was also portedto the SpiNNaker 2 neuromorphic many-core system. Neuromorphic systems often operate in an environment where they are permanently on and learning a continuous stream ofdata. This mode of operation is quite different from most other machine learning applications that work with hand-labeledbatches of training data. Always-on learning on a system with limited resources inevitably leads to situations where the systemreaches the limits of its memory capacity and thus starts forgetting previously learned sensory experiences. Inspiration toovercome forgetting relevant information comes from biology. The mammalian brain seems to combat forgetting by activelyprotecting previously acquired knowledge in neocortical circuits . When a new skill is acquired, a subset of synapses isstrengthened, stabilized and persists despite the subsequent learning of other tasks .A theoretical treatment of the forgetting problem was conducted in the cascade model of Stefano Fusi and others .They could show that learning an increasing number of patterns in a single neural network leads unavoidably to a state whichthey called catastrophic forgetting. Trying to train more patterns into the network will interfere with all previously learnedones, effectively wiping out the information stored in the network. The proposed cascade model to overcome this problem usesmultiple parameters per synapse that are linked through a cascade of local interactions. This cascade of parameters selectivelyslows down weight changes, thus stabilizes synapses when required and effectively combats effects of forgetting. A relatedmodel, that uses multiple parameters per synapse to combat forgetting was used in (see also for a recently introducedvariation of the model). They used a Bayesian approach that infers a prior distribution over parameter values at each synapse.Synapses that stabilize during learning (converge to a fixed solution) will be considered relevant in subsequent learning andBayesian priors help to maintain their values (see Fig. 2c for an illustration). Distributed computing architectures at the edge need to make decisions by integrate information from different sensors andsensor modalities and they should be able best make use of the sensory information across a wide range of tasks. It is clearly notvery efficient to learn from scratch when confronted with a new task. Therefore, to boost the performance of edge computing,we will consider two aspects of transferring information to new situations: transfer of knowledge between sensors ( sensorfusion ), which has been treated in Section 2.2, and transfer of knowledge between multiple different tasks ( transfer learning ). Transfer learning denotes the improvement of learning in a new task through the use of knowledge from a related task thathas already been learned previously . This contrasts most other of today’s machine learning applications that focus onone very specific task. In transfer learning, when a new task is learned, knowledge from previous skills can be reused withoutinterfering with them. E.g. the ability to perform a tennis swing can be transferred to playing ping pong, while maintaining theability to do both sports. The literature on transfer learning is extensive and many different strategies have been developeddepending on the relationship between the different task domains (see and for systematic reviews). In machine learning anumber of approaches have been applied to a wide range of problems, including classification of images , text orhuman activity .A very general approach to learn across multiple domains is followed in the learning to learn framework of . Theirmodel features networks that are able to modify their own weights through the network activity. These network are thereforeable to tinker with their own processing properties. This approach has been taken to its most extreme form where a networkleans to implement an optimization algorithm by itself . This model consists of an outer-loop learning network ( the optimizer )that controls the parameters of an inner-loop network ( the optimizee ). The training algorithm of the inner-loop network workson single tasks that are presented sequentially, whereas the outer-loop learner operates across tasks and can acquire strategies totransfer knowledge. This learning-to-learn framework was recently applied to SNNs to obtain properties of LSTM networks anduse them to solve complex sequence learning tasks . In the learning-to-learn framework was also applied to a neuromorphichardware platform.
Neuromorphic engineering is a branch of electrical engineering dedicated to the design of analog/digital data processorsthat aims to emulate biological neurons and synapses. It typically consumes less energy than conventional computingsystems and presents additional properties, such as massively parallel event-based computation, distributed local memory and daptation . This increasing interest in neuromorphic engineering shows that hardware SNNs are considered a key futuretechnology with high potential in key application, such as the Edge of Computing, and wearable devices.Neuromorphic technologies have sparked interest from universities and companies such as IBM and Intel . Inthis Section, we will provide an overview of the neuromorphic platforms, that to the best of our knowledge were deployed forbiomedical signal processing, showing promising results to be exploited in wearable devices. TrueNorth.
TrueNorth is IBM’s fully digital neuromorphic chip with one million neurons arranged in a tiled array of 4096neurosynaptic cores enabling massive parallel processing . Each core contains 13kB of local SRAM memory to keep neuronsand synapse’s states along with the axonal delays and information on the fan-out destination. There are 256 Leaky-Integratorand Fire (LIF) neurons implemented by time-multiplexing and 256 million synapses are designed in the form of SRAM memory.Each core can support up to 256 fan-in and fan-out, and this connectivity can be configured such that a neuron in any core cancommunicate its spikes any other neuron in any other core.Thanks to the event-driven , the co-location of memory and processing units in each core, and the use of low-leakage siliconCMOS technology, TrueNorth can perform 46 billion synaptic operations per second (SOPS) per watt for real-time operation,with 26 pJ per synaptic event. Its power density of 20 mW/cm is about three orders of magnitude smaller than that of typicalCPUs. SpiNNaker.
The SpiNNaker machine , designed by the University of Manchester, is a custom-designed ASIC basedon massively parallel architecture that has been designed to efficiently simulate large spiking neural networks. It consistsof ARM968 processing cores arranged in a 2D array where the precise details of the neurons and their dynamics can beprogrammed into. Although the processing cores are synchronous microprocessors, the event-based aspect of SpiNNaker isapparent in its message-handling paradigm. A message (event) gets delivered to a core generating a request for being processed.The communications infrastructure between these nodes is specially optimized to carry very large numbers of very smallpackets, optimal for spiking neurons.A second generation of SpiNNaker was designed by Technical University of Dresden . Spinnaker2 continues the line ofdedicated digital neuromorphic chips for brain simulation increasing the simulation capacity by a factor >
10 while stayingin the same power budget (i.e. 10x better power efficiency). The full-scale SpiNNaker2 consists of 10 Million ARM coresdistributed across 70000 Chips in 10 server racks. This system takes advantage of advanced 22nm FDSOI technology node withAdaptive Body Biasing enabling reliable and ultra-low power processing. It also features incorporating numerical acceleratorsfor the most common operations.
Loihi.
Loihi is Intel’s neuromorphic chip with many core processing incorporating on-line learning designed in 14 nmFinFET technology. The chip supports about 130000 neurons and 130 million synapses distributed in 128 cores. Spikes aretransported between the cores in the chip using packetized messages by an asynchronous network on chip. It includes threeembedded x86 processors and provides a very flexible learning engine on which diverse online learning algorithms such asSpike-Timing Dependent Plasticity (STDP), different 3 factor and trace-based learning rules can be implemented. The chipalso provides hierarchical connectivity, dendritic compartments, synaptic delays as different features that can enrich a spikingneural network. The synaptic weights are stored on local SRAM memory and the bit precision can vary between 1 to 9 bits. Alllogic in the chip is digital, functionally deterministic, and implemented in an asynchronous bundled data design style. DYNAP-SE.
DYNAP-SE implements a multi-core neuromorphic processor with scalable architecture fabricated using astandard 0.18 µ m CMOS technology . It is a full-custom asynchronous mixed-signal processor, with a fully asynchronousinter-core and inter-chip hierarchical routing architecture. Each core comprises 256 adaptive exponential integrate-and-fire(AEI&F) neurons for a total of 1k neurons per chip. Each neuron has a Content Addressable Memory (CAM) block, containing64 addresses representing the pre-synaptic neurons that the neuron is subscribed to. Rich synaptic dynamics are implemented onthe chip by using Differential Pair Integrator (DPI) circuits . These circuits produce EPSCs and IPSCs (Excitatory/InhibitoryPost Synaptic Currents), with time constants that can range from a few µ s to hundreds of ms . The analog circuits are operatedin the sub-threshold domain, thus minimizing the dynamic power consumption, and enabling implementations of neural andsynaptic behaviors with biologically plausible temporal dynamics. The asynchronous CAMs on the synapses are used to storethe tags of the source neuron addresses connected to them, while the SRAM cells are used to program the address of thedestination core/chip that the neuron targets. ODIN/MorphIC.
ODIN (Online-learning DIgital spiking Neuromorphic) processor occupies an area of only 0.086mm in28nm FDSOI CMOS . It consists of a single neurosynaptic core with 256 neurons and 256 synapses. Each neuron can beconfigured to phenomenologically reproduce the 20 Izhikevich behaviors of spiking neurons . The synapses embed a 3-bitweight and a mapping table bit that allows enabling or disabling Spike-Dependent Synaptic Plasticity (SDSP) locally , thusallowing for the exploration of both off-chip training and on-chip online learning setups.MorphIC is a quad-core digital neuromorphic processor with 2k LIF neurons and more than 2M synapses in 65nm CMOS . able 1. Summary of neuromorphic platforms and biomedical applications
Neuromorphic Chip DYNAP-SE SpiNNaker Loihi TrueNorth ODINCMOS Technology
Implementation
Mixed-signal Digital Digital ASIC Digital ASIC Digital ASIC
Energy per SOP
17 pJ @ 1.8V Peak power 1W perchip 23.6 pJ @0.75V 26 pJ @ 0.775 12.7 [email protected]
Size mm mm mm mm (core) 0.086 mm On-chip learning
No Yes (configurable) Yes(configurable) No Yes (SDSP)
Applications
EMG, ECG, HFO EMG and EEG EMG EEG and LocalFieldPotential (LFP) EMG
MorphIC was designed for high-density large-scale integration of multi-chip setups. The four 512-neuron crossbar cores areconnected with a hierarchical routing infrastructure that enables neuron fan-in and fan-out values of 1k and 2k, respectively.The synapses are binary and can be either programmed with offline-trained weights or trained online with a stochastic versionof SDSP.
Table 1 shows the summary of neuromorphic processors described previously and in which biomedical signal processingapplications were used. These works show promising results for always-on embedded biomedical systems.The first chip presented in this table is DYNAP-SE, used to implement SNNs for the classification or detection of EMG and ECG and to implement a simple spiking perceptron as part of a design to detect High Frequency Oscillation (HFO)in human intracranial EEG . In particular, in a spiking RNN is deployed for ECG/EMG signal separation to facilitatethe classification with a linear read-out. SVM and linear least square approximation is used in the read out layer for andoverall accuracy of 91% and 95% for anomaly detection were reached respectively. In , the state property of the spiking RNNon EMG was investigated for different hand gestures. In the performance of a feedforward SNN and a hardware-friendlyspiking learning algorithm for hand gesture recognition using superficial EMG was investigated and compared to traditionalmachine learning approaches, such as SVM. Results show that applying SVM on the spiking output of the hidden layerachieved a classification rate of 84%, and the spiking learning method achieved 74% with a power consumption of about0 . mW . The consumption was compared to state-of-the-art embedded system showing that the proposed spiking network istwo orders of magnitude more power efficient .Recently, the benchmark hand-gesture classification was processed and compared on two other digital neuromorphicplatforms, i.e. Loihi and ODIN/MorphIC . A spiking Convolutional Neural Network (CNN) was implemented on Loihiand a spiking Multilayer Perceptron (MLP) was implemented on ODIN/MorphIC . Because of the properties of neuromorphicchips, on Loihi a late fusion was implemented combining the output from the spiking CNN for vision, and the spiking MLP forEMG signals; While on ODIN/MorphIC hardware, the two spiking MLPs were fused in the last layer. Due to the neuromorphicchip properties the Loihi implemented a late fusion of a spiking CNN, for vision and a spiking MLP for EMG signals. Inthe ODIN/MorphIC system two spiking MLPs were fused in the last layer. The comparison with the embedded GPU wasperformed in terms of accuracy, power consumption, and latency showing that the neuromorphic chips are able to achieve thesame accuracy with significantly smaller energy-delay product, 30x and 600x more efficient for Loihi and ODIN/MorphIC,respectively . In SNNs a single spike by itself does not carry any information. However, the number and the timing of spikes produced by aneuron are important. Just as their biological counterpart, silicon neurons in neuromorphic devices produce spike trains at a ratethat is proportional to their input current. At the input side, synapse circuits integrate the spikes they receive to produce analogcurrents, with temporal dynamics and time constants that can be made equivalent to their biological counterparts. The sum ofall the positive (excitatory) and negative (inhibitory) synaptic currents afferent to the neuron is then injected into the neuron.To provide biomedical signals to the synapses of the SNN input layer, it is necessary to first convert them into spikes. Acommon way to do this is to use a delta-modulator circuit functionally equivalent to the one used in the Dynamic VisionSensor (DVS) . This circuit, in practice, is an ADC that produces two asynchronous digital pulse outputs (UP or DOWN) for very biosignal channel in the input. The UP (DOWN) spikes are generated every time the difference between the current andprevious value exceeds a pre-defined threshold. The sign of the difference corresponds to the UP or DOWN channel where thespike is produced. This approach was used to convert EMG signals, used in mixed-signal neuromorphic chips and indigital ones , ECG signals , and EEG and HFO ones . Local adaptation is an important aspect in extreme edge computing, specially when it comes to wearable devices. The currentmethods for training networks for biomedical signals rely on large datasets collected from different patients. However, whenit comes to biological data, there is no “one size fits all”. Each patient and person has their own unique biological signature.Therefore, the field of Personalized Medicine (PM) has gained lots of attention in the past few years and the online on-edgeadaptation feature of neuromorphic chips can be a game changer for PM.As was discussed in Section 3.1, there are lots of effort in designing spike-based online learning algorithms which can beimplemented on neuromorphic chips.Example of today’s state of the art for on-chip learning are Intel’s Loihi , DynapSEL and ROLLS chip from UZH/ETHZ ,BrainScales from Heidelberg and ODIN from UC Louvain . Intel’s Loihi includes a learning engine which can implementdifferent learning rules such as simple pairwise STDP, triplet STDP, reinforcement learning with synaptic tag assignmentsor any 3 factor learning rule implementation. DynapSEL, ROLLS and ODIN encompass the SDSP, also known as the Fusilearning rule, which is a form of semi-supervised learning rule that can support both unsupervised clustering applications andsupervised learning with labels for shallow networks . BrainscaleS chip implements the STDP rule. Moreover, Spinnaker 1and 2 can implement a wide variety of on-chip learning algorithms since their designs make use of ARM microcontrollersproviding lots of configurability for the users. Generally, implementing on-chip online learning is challenging because of these two core reasons: locality of the weight updateand weight storage.
Locality
The learning information for updating the weights of any on-chip network should be locally available to the synapsesince otherwise this information should be “routed” to the synapse by wires which will take a significant amount of area on chip.The simplest form of learning which satisfies this requirement is Hebbian learning which has been implemented on a varietyof neuromorphic chips forms of unsupervised/semi-supervised learning . However, Hebbian-based algorithms arelimited in the tasks they can learn and to the best of our knowledge no large scale task has been demonstrated using this rule.Since gradient descent-based algorithms such as Backprop has had lots of success in deep learning, there are more and morespike-based error Backprop rules that are being developed as was discussed in Section 3.1. These types of learning algorithmshave recently been custom designed in the form of spike-based delta rule as back-bone of the Backprop algorithm. For example,single layer implementation of the delta rule has been designed in and employed for EMG classification . Expanding thisto multi-layer networks involves non-local weight updates which limits its on-chip implementation. Making the Backpropalgorithm local is a topic of on-going research which we have discussed in Section 3.1. Recently, a multi-layer perceptronerror-triggered learning architecture has been proposed to overcome the non-locality of multi-layer networks solving the spatialcredit assignment problem on chip
Weight storage
The ideal weight storage for online on-chip learning should have the following properties: (i) non-volatilityto keep the state of the learnt weights even when the power shuts down to reduce the time and energy footprints of reloading theweights to the chip. (ii) Linear update which allows the state of the memory to change linearly with the calculated update. (iii)Analog states which allows a full-precision for the weights. Non-volatile memristive devices have been proposed as a greatpotential for the weight storage and there is a large body of work combining the CMOS technology with that of the memristivedevices to get the best of two worlds.In the next Section we provide a thorough review on the state of the art for the emerging memory devices and the efforts tointegrate and use them in conjunction with neuromorphic chips.
The severe power and area constraints under which a neuromorphic processor for edge computing must work opened waystowards the investigation of beyond-CMOS solutions. Despite still at the dawn of its technological development, memristivedevices have been drawing attention in the last decade thanks to their scalability, low-power operation, compatibility withCMOS chip power supply and CMOS fabrication process, and volatile/non-volatile properties. In Section 5.1, we will introducememristive devices and the properties that are appealing for adaptive extreme edge computing paradigms. In Section 5.2, igure 3.
Memristive devices for neuromorphic computing. (a) Interface type RRAM device; (b) Filamentary RRAM device;(c) Phase change memory device; (d) MRAM device with in-plane spin polarization; (e) MRAM device with perpendicularspin polarization; (f) FTJ device.we will explore the role of memristive devices in neuromemristive systems and give examples of possible applications. InSection 5.3, we will discuss the current challenges and the future perspectives of memristive technology.
Memristive devices, as the name suggested, are devices which can change and memorize their resistance states. They areusually two-terminal devices, however, can be implemented with various physical mechanisms, resulting in versatile existingforms, e.g. resistive random access memory (RRAM, Fig. 3a and 3b) ( ), phase change memory (PCM, Fig. 3c) ( ),magnetic random access memory (MRAM, Fig. 3d and Fig. 3e) ( ), ferroelectric tunneling junction (FTJ, Fig. 3f) ( ), etc.The resistance memory of these devices can mimic the memory effect of the basic components of biological neural system,while the resistance changing can mimic the plasticity of biological synapse. Facilitated with their simplicity of two-terminalconfiguration and scalability to nanoscale, they are inherently suitable for the hardware implementation of brain-inspiredcomputation materializing an artificial neural network, i.e. neuromorphic computation ( ).This notation, in recent years, has incited wide investigations on the various memristive devices and on their applications inneural network learning and recognition, or, in short, memristive learning ( ). The memristive learning can enable energyefficient and low latency information process within a reduced size of systems abandoning the conventional von-Neumannarchitecture. Among other benefits, this will also make it possible to process information where they are acquired, i.e. withinsensors, and reduce the bandwidth needed for transferring the sensor data to data center, accelerating the coming of the era ofInternet-of-Things (IOT). Table 2 summarizes the key features of the main memristive device technologies for neuromorphic /wearable applications in terms of cell area, electrical characteristics, main advantages and challenges. It is worth noticing thatsome figures of merit in this context are radically different with respect to standard memory requirements. Indeed, while in thememory scenario higher read currents enable faster reading speed, in neuromorphic applications currents as low as possibleare preferred, since the current is a limiting factor for neurons’ fan-out. Similarly, SET and RESET times should be as fastas possible in memory applications, while in our applications this requirement can be relaxed thanks to the lower operatingfrequency of the neurons (20 Hz to 100 Hz). Moreover, the number achievable conductance levels has to be increased ( ).Some non-idealities which are usually detrimental for memory applications, for instance stochasticity of switching parameters,are even beneficial for the neural networks.In addition to the commonly referred non-volatile type of memristive switching, the RRAM device can also show volatilebehavior, which usually occurs when active materials such as silver or copper are used as electrode. The relatively long retentiontime of the volatile behavior (tens of milliseconds to seconds) is then found to be similar to the timescale of short term memory,and naturally was proposed to mimic the short term memory effect of biological synapses ( ).Although most researches on memristive devices are carried on rigid silicon substrates, the simple structure of memristivedevices can also be realized on flexible substrates ( ), which opens new interesting possibilities for realizing local computation able 2. Key features of non-volatile memristive devices.
RRAM PCM MRAM FTJ
Cell area [min.feature size] F F F ( ) 4 F Retention >
10 years ( ) >
10 years ( ) >
10 years ( ) >
10 years ( ) Endurance ( ) 10 ( ) 10 ( ) > ( ) SET / RESET time
100 ps ( ) >
100 ns, 10 ns 20 ns ( ) 30 ns, 30 ns85 ps ( ) ( ) 3 ns ( ) ( ) Read current
100 pA ( ) 25 µ A ( ) 20 µ A ( ) 0.8 nA ( , devicediameter 300 nm)
Write energy per bit
20 fJ ( ) ∼
100 fJ ( ) 90 fJ ( ) <
10 fJ ( ) Main features
Scalability, speed, lowenergy Scalability, multilevel,low voltage Endurance, low power Endurance, low power,speed
Challenges
Variability RESET current,temperature stability,resistance drift Density, scalability,variability Scalability within wearable devices ( ). As mentioned in Section 5.1, the primary function of memristive devices is the usage as synaptic devices to implement thememory and plasticity of biological synapses. However, there are increasing interests for these devices to be utilized toimplement nanoscale and artificial neurons.On the neuron side, the memristive device gradual internal state change and its consequently abrupt switching closelymimic the integrate-and-fire behavior of biological neurons ( , Fig. 4a-c). Due to the sample structure and nanometerlevel scalability, memristive neurons can be much more compact than current CMOS neurons which might consist of currentsensor, analog-to-digital converter (ADC), and analog-to-digital converter (DAC), and capacitors, all of which are expensive toimplement in current CMOS technology in terms of area and/or power consumption ( ). The implementation of memristiveneurons will also enable full memristive neuromorphic computing ( ), which promises further increases in the integration ofthe hardware neuromorphic computing.On the synaptic side, the key feature of the biological synapses is their plasticity, i.e. tunable weight, which can be generallyimplemented by resistance or conductance modification in the memristive devices (Fig. 4d). Fundamental learning rulesbased on STDP have already been widely explored ( ). Spatial spiking pattern recognition ( ), spiking co-incidencedetection ( ), and spatial-temporal correlation ( ) has been reported recently. Synaptic metaplasticity, such aspaired-pulse facilitation, can also be achieved via various device operation mechanism ( ). There are generally two approaches for a hardware neuromorphic system implementing memristive devices as synapses: (i)deep learning accelerator, accelerating the artificial neural network computing with multiple layer and error back-propagation,as well as it’s variations, like convolutional neural network, recurrent neural network, etc.; (ii) brain-like computing, attemptingto closely mimicking the behaviors of biological neural system, like spike representation (Fig. 4d) and collective decisionmaking behavior. In the deep learning accelerator approach, on-line training places more requirements for the memristivesynapses. For instance, linear and symmetrical weight update is crucial for the on-line training ( ), while off-line trainingignores it since the synaptic weight can be programmed to the memristive device with fine tuning and iterative verify ( ).Collective decision making is an important feature of the brain computing, which requires high parallelism and, consequently,low current devices. For instance, this feature is the essential for Hopfield neural network ( ), cellular neural network ( ),and coupled oscillators ( ). In the Hopfield neural network, the system automatically evolves to its energy minimization pointsleading the functionality of associative memory. The use of Hopfield like recurrent neural networks (RNNs) with memristivedevices has already been successfully demonstrated in a variety of tasks ( ). As an example of memristive based coupledoscillator network, used a network of self-sustained van der Pol oscillators coupled with oxide-based memristive devices to igure 4.
Memristive devices as synapse or neuron for neuromorphic computing. (a)-(c) memristive device act as thresholddevice for the firing function of biological neuron ( , reproduced under the CC BY license). (d) Conceptual illustration ofmemristive device as artificial synapse for brain-like neuromorphic computing ( , reproduced under the CC BY-NC license).investigate the temporal binding problem, which is a well known issue in the field of cognitive neuroscience. In this experiment,the network is able to emulate an optical illusion which shows two patterns depending on the influence of attention. This meansthat the network is able to select relevant information from a pool of inputs, as in the case of a system collecting signals frommultiple sensors.
At present, memristive technology has been mainly used in relatively simple networks with Hebbian-based learning algorithms.However, more recently, systems able of solving different tasks, such as speech recognition ( ), and exploring differentarchitectures and learning algorithms are being investigated. In particular, the benefits of exploiting sparsity, mentioned inSection 3.2, are demonstrated for feature extraction and image classification in networks trained with stochastic gradientdescend and winner-take-all learning algorithms ( ), as well as in hierarchical temporal memory, which does not need training( ).In the latest years, memristive devices have been used in applications closer to biology, enabling hybrid biological-artificialsystems ( ) and investigating biomedical applications, ranging from speech and emotion recognition ( ) to biosignal ( )and medical image ( ) processing. Finally, an interesting application is the one of memristive biosensors, which used toimplement a system for cancer diagnostic. The innovative use of memristive properties was demonstrated in hardware andopens the way to a broader use of memristive technology where sensors and computing co-exist in the same system or, possibly,in the same device.
Implementation of mainstream deep learning algorithms with Backprop learning rule and memristive synapses imposes somerequirements for the memristive device, including linear current-voltage relation for reading, analog conductance tuning, linearand symmetric weight update, long retention time, high endurance, etc. ( ). However, no single device can fulfill all theserequirements simultaneously.Various techniques have been proposed to compensate the device non-idealities. For instance, to compensate the non-linearcurrent-voltage relation for reading, fixed read voltage with variable pulse width or pulse number can be used for synaptic eight reading, and the readout is represented by the charge accumulation in the output nodes ( ). Linear and symmetricweight update is crucial for accurate online learning of a memristive multilayer neural network with Backprop learning rule( ). However, PCM devices usually only show gradual switching in set direction (weight potentiation), while RRAM devicesshow gradual switching in reset direction (weight depression). To achieve linear and symmetric weight update, differentialpair with two of these devices are usually used. For a differential pair with two PCM devices, the potentiation is achieved byapplying set pulses on the positive part and the depression is achieved by applying set pulses on the negative part, thus gradualweight update in both potentiation and depression can be achieved. To further enhance the linearity of weight update, a minorconductance pair consisting of capacitors can be used for frequent but smaller weight update, and finally transferred to themajor pair periodically ( ). Another option to improve device linearity is limiting the device dynamic range in a region farfrom saturation and where the weight update is linear .In addition to mitigate the non-idealities of memristive devices, more and more research efforts are made to exploit thesenon-idealities for brain-like computations. For instance, the stochasticity or noise in reading of memristive device can be usedfor the probability computation for restricted Boltzmann machine ( ), or escape for local minimization points in a Hopfieldneural network ( ). The Ag filament based resistive switching device shows short retention time and high switching dynamics,thus was proposed for reservoir computing ( ) and spatiotemporal computing ( ) to process time-encoded information.
The main steps to be taken to exploit the full potential of an ASIC for end-to-end processing system go through the integrationof memristive devices and sensors with CMOS technology. Indeed, the works presented so far are based either on simulationsor on real device data, or on memristive chips interfaced with some standard digital hardware. Despite integration of CMOStechnology has been demonstrated for non-volatile resistive switching devices already at a commercial level ( ), the designof co-integrated memristive-based neuromorphic processors is still under development. We envisage a three-phase process toachieve a fully integrated system.The first one is the co-integration of non-volatile memristive devices with some peripheral circuits ( ) and to implementsome logic and multiply-and-accumulate (MAC) operations ( ), which reaches the maturity with the demonstration of a fullycointegrated SNN with analog neurons and memristive synapses ( ). The second phase is the co-integration of differenttechnologies. Despite this approach results in higher fabrication costs, it presents several advantages in terms of systemperformance, which can be more compact and potentially more power efficient. In particular, the co-integration of non-volatileand volatile memristive devices can lead to a fully memristive approach. As an example, exploit volatile memristivedevices to emulate stochastic neurons and non-volatile memristive devices to store the synaptic weights on the same chip, thusdemonstrating the feasibility and the advantages of the dual technology co-integration process. Eventually, the final step whichhas to be taken in the development of a dedicated ASIC for wearable edge computing is the co-integration of sensors andmemristive-based systems. tackled this challenge by designing and fabricating a gas sensing system able of gas classification.The system uses RRAM arrays as memory, Carbon Nanotube field effect transistor (CNFET) for computation and gas sensing,both 3D monolithically integrated on CMOS circuits, which carry out computation and allow memory access.
Adaptability is a feature of paramount importance in smart wearable devices, which need to be able to learn the unique feature oftheir user. This calls for the implementation of lifelong learning paradigms, i.e. the ability of continuously learning new featuresfrom experience. Typically, a network has a limited memory capacity dependent on the network size and architecture. Once themaximum number of experiences is recorded, new features learned will erase old ones, thus originating the phenomenon ofcatastrophic forgetting.The problem of an efficient implementation of continual learning has been thoroughly investigated ( ). In the currentscenario, a dichotomy exist between backprop-based ANNs, which have very high accuracy but a limited memory capacity,and brain-inspired SNNs, which feature higher memory capacity thanks to their higher flexibility, but at the cost of loweraccuracy. Models used to overcome forgetting are described in Section 3.3. The use of memristive devices in such networks isstill an open point. It is possible that memristive device will be beneficial to increase the network capacity ( ) at no extracomputational cost thanks to their slow approach to the boundaries ( ), but so far this topic is still quite unexplored. Aninteresting approach is proposed by , where the key strengths of supervised convolutional ANNs, unsupervised SNNs, andmemristive devices are combined in a single system. The results indicate that this approach is robust against catastrophicforgetting, whilst reaching 93% accuracy when tested with both trained and non-trained classes.
In this study, we presented the state-of-the-art core elements that enable the development of wearable devices with extremeedge adaptive computing capability. Various sensors that can collect different bio-signals from the human body are investigated. here is a variety of sensing specifications in terms of size, resolution, mechanical flexibility and output signals need to beconsidered along with their analogue readout circuit at a limited amount of power consumption. However, when the real-timeprocessing of these signals is deployed on edge, severe constraints raise in terms of power efficiency, fast response times,and accuracy in the data classification. The widely-used solution is to find a trade-off between the energy and computationalcapacity, or send the data to the cloud. However, these strategies are not ideal and slow down the development of wearablesmart sensing. To meet all the requirements, the development of a platform needs to be optimized in synergy with the otherelements and every aspect of the design, from the learning algorithms to the architecture.In particular, continual learning is required for adaptive wearable devices. In this respect, brain-inspired algorithms promiseto be valid alternatives to standard machine learning approaches such as Backprop and BPTT. The exploitation of sparsity innetwork connectivity increases the power efficiency by optimizing the use of the available memory. However, the problem ofalgorithmic robustness to non-ideal hardware (such as noise and variability) and the problems of forgetting and informationtransfer between tasks still persist and have to be solved in combination with neuromorphic and emerging technologies. SNNsare conceptually ideal for low-power in-memory computing. Their event-based approach together with the use of analogsubthreshold circuits to reproduce biological timescales, allows fast response times of the network while enabling smoothreal-time processing of data. The encoding of the incoming signals into spikes is however still challenging. Moreover, a fullyCMOS-based approach has two major technological issues. First, the synaptic weight is usually stored in SRAMs, which holdthe state only in the presence of a power supply. Second, capacitors used to implement biological time constants are massiveand may consume up to 60% of the chip area. Memristive technology can be beneficial in this respect. Non-volatile devices canpotentially replace SRAMs and volatile devices offer a compact alternative to CMOS capacitors. Besides low-power operationin a small footprint, memristive devices also offer noisy properties, which – if exploited in the right way – might facilitate theimplementation of stochastic learning algorithms. However, the technology is still at its infancy and fabrication processes arestill under development, yielding high device variability, which makes it difficult to produce reliable multi-bit memory.In summary, the ultimate goal towards smart wearable sensing with edge computing capabilities relies on a bespokeplatform consists of embedding sensors, front-end circuit interface, neuromorphic processor and memristive devices. Thisplatform requires high-compatibility of existing sensing technologies with CMOS circuitry and memristive devices to movethe intelligent algorithm into the wearable edge without significantly increase the cost in energy. New solutions are needed toenhance the performance of local adaptive learning rules to be competitive with the accuracy of Backprop. Novel encodingtechniques to allow streamless communication from sensors to neuromorphic chip have to be developed and flanked by efficientevent-based algorithms. So far there is not a uniquely ideal solution, but we envisage that a holistic approach where all theelements of the system are co-designed as a whole is the key to build low-power end-to-end real-time adaptive systems fornext-generation smart wearable devices.
Conflict of Interest Statement
The authors declare that the research was conducted in the absence of any commercial or financial relationships that could beconstrued as a potential conflict of interest.
Author Contributions
All the Authors equally contributed to the manuscript, actively participating to the discussions and to the writing. The maincontributors for each Section are as follows: X.L. and H.H. – wearable sensors; D.K. – biologically plausible models; M.P. andE.D. – signal processing and neuromorphic computing. E.C. and W.W. – memristive devices. E.C. led and coordinated thecooperative writing and all discussions.
Funding
This work was partially supported by the UK EPSRC under grant EP/R511705/1. E.C. and M.P. acknowledge funding by theEuropean Union‘s Horizon 2020 research and innovation programme under grant agreement No 871737.
Acknowledgments
The Authors would like to thank Prof. Thomas Mikolajick and Dr. Stefan Slesazeck for useful discussion on ferroelectric andmemristive devices.
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