Comments on "sub-KBT micro-electromechanical irreversible logic gate"
1 Fluctuation and Noise Letters, accepted for publication (June 30, 2016). Version after galley proof correction (July 20, 2016)
COMMENTS ON "SUB- k B T MICRO-ELECTROMECHANICAL IRREVERSIBLE LOGIC GATE"
LASZLO B. KISH (1)
Department of Electrical and Computer Engineering, Texas A&M University, College Station, TX 77843-3128, USA [email protected]
Abstract.
In a recent article,
Nature Communications (2016) 12068, the authors claimed that they demonstrated sub- k B T energy dissipation at elementary logic operations. However, the argumentation is invalid because it neglects the dominant source of energy dissipation, namely, the charging energy of the capacitance of the input electrode, which totally dissipates during the full (0-1-0) cycle of logic values. The neglected dissipation phenomenon is identical with the mechanism that leads to the lower physical limit of dissipation (70-100 k B T ) in today's microprocessors (CMOS logic) and in any other system with thermally activated errors thus the same limit holds for the new scheme, too. Keywords:
Energy dissipation of control; Dissipation limits in logic gates; Error probability.
In a recent article [1], the authors claim that they demonstrate sub- k B T energy dissipation at elementary logic operations. In the experiments, they use Micro-Electromechanical Cantilevers (MEC) where the attractive electrostatic forces toward the input electrode(s) control the position of the cantilever tip. The Authors discuss an OR gate however, for the sake of simplicity but without the loss of generality, we investigate a Follower logic gate in this paper. Two separate tip positions define the two logic values, 0 and 1, respectively. These logic values and tip positions correspond to driving voltages 0 and U on the input electrode. The energy dissipation (due to friction) in the cantilever is measured during changing the logic value and the Authors correctly conclude that the energy dissipation due to friction can be made smaller than k B T . This is the point where we must ask: Does this approach account for all the major energy loss phenomena determining the lower limit of energy dissipation or is there any dominant but neglected component?
The answer is straightforward: The considerations in [1] neglected the energy dissipation due to charging and discharging the input capacitance, which are the same dissipation phenomena [2-6] that determine the lower limits of dissipation (70-100 k B T ) [3] not only in today's microprocessors (CMOS logic) but also in any other system with thermally activated errors [2-6]. Thus the same dissipation limit (70-100 k B T ) holds for the new scheme in [1], too. o sub-kT logic operations, except erasure.
2 While the flaw in [1] is now obvious due to the above arguments and no further considerations are needed to deny the validity of the sub- k B T energy dissipation claim, for the Readers who are less familiar with the topic, we provide more details below. In voltage-controlled logic, see Figure 1, when the switch S is closed, the voltage on the capacitor is changing from the value 0 to U while the logic (bit) value is switching between 0 and 1. Fig. 1. Elementary circuit model to show the major energy dissipation in voltage-controlled logic [3].
Thus, in the case of the 0 ==> 1 bit value change, the energy of the capacitor is changing from zero value to E = CU , (1) while exactly the same amount of energy ( E ) is dissipated in the resistor R due to its heating by the charging current. Here C represents the input capacitance (the gate capacitance in CMOS logic) and R is the resistance of the closed switch (the source-drain resistance in CMOS). During erasure by resetting, S is off, S is closed, and again energy E is dissipated in the other resistor. However, the resistors create Johnson noise (thermal noise) leading to thermally activated bit errors depending on the magnitude of U , which separates the logic states 0 and 1. Considerations based on these effects result in the following formula for the lower limit of energy dissipation in arbitrary systems with thermally activated errors [2-6]: Q τ ≈ k B T ln 1 ε , (2) where ε (<0.5) is the error probability during the observation time, and the formula is valid in the short observation time limit, that is, when the observation time of error events is less than the correlation time τ of thermal fluctuations activating the errors (the Johnson noise on the capacitor). The value of Q τ is around 70 k B T at today's error probability expectations [3]. In the long observation time, t o , limit, Equation 2 is slightly modified [5,6]: Q t ≈ k B T ln 1 ε⎛⎝⎜ ⎞⎠⎟ + ln t o τ⎛⎝⎜ ⎞⎠⎟⎡⎣⎢ ⎤⎦⎥ , (3) .B. Kish
3 which results in a slightly higher energy dissipation, Q t ≈ k B T with today's typical bandwidth and t o = year . The logic gate described in [1] is also a voltage-controlled gate with the unavoidable Johnson noise during charging and discharging the input capacitance [6], thus, Equations 2,3 and the corresponding dissipation of 70 - 100 k B T holds there, too. However, the argumentation is invalid because it neglects the dominant source of energy dissipation, the 50% loss of the charging energy of the capacitance of the control gate and the total loss of the remaining part during discharging. The neglected dissipation phenomenon is identical with the mechanism that leads to the ultimate dissipation limit in today's microprocessors (CMOS logic), thus the same limit holds for both. To preempt the question if there is a way to charge and discharge a capacitor without the loss of energy shown above we show the resonant circuit solution used in switching power supplies, see Figure 2. Suppose C is charged, C is not. Closing S causes a sinusoidal current flow in the coil L . At the peak value of the current, all the energy is magnetic and C has discharged state. Then S closes and S opens. When the current reaches the zero value, all the energy is transferred into C . However, such energy saving scheme is efficient only at large (>>70 k B T ) charging energies. The situation is much worse at the logic gate energy range because then two new switches must also operate, each one with energy dissipation similar to the energy we want to save! Fig. 2. "Tank" LC circuit example to bounce the charging energy in a lossless way between two capacitors with timed switches and LC resonator. Due to the energy dissipation of controlling the switches, it fails at the charging energy range where logic gates operate. All similar efforts require to increase the number of switching events thus lead to increased energy dissipation at the energy levels of logic gates.
Finally, without arguments or details, we summarize our general results [7,8] in the related matter of energy dissipation in memories and logic gates: i. Information entropy cannot be interrelated with dissipation, in general [8] . ii. Writing of data (running of logic gates) is dissipation costly. iii. Erasure, on the other hand, can be completely dissipation-free, in special cases [7] . There are interesting alternative considerations with related conclusions, see, e.g. [9,10].
References o sub-kT logic operations, except erasure. [1] M. López-Suárez, I. Neri, L. Gammaitoni, Sub- k B T micro-electromechanical irreversible logic gate, Nature Communications (2016) 12068. [2] L. Brillouin, Science and Information Theory , Academic: New York, 1962. [3] L.B. Kish, Moore’s Law and the energy requirement of computing versus performance,
IEE Proc. – Circ. Dev. Syst. (2004) 190–194. [4] R. Alicki, Stability versus reversibility in information processing,
Int. J. Mod. Phys. Conf. Ser. (2014) 1460353. [5] L.B. Kish, C.G. Granqvist, Energy requirement of control: Comments on Szilard’s engine and Maxwell’s demon, EPL (2012) 68001. [6] L.B. Kish, C.G. Granqvist, Electrical Maxwell Demon and Szilard Engine Utilizing Johnson Noise, Measurement, Logic and Control, PLoS ONE (2012) e46800. [7] L.B. Kish, C.G. Granqvist, S.P. Khatri, F. Pepper, Zero and negative energy dissipation at information-theoretic erasure, J. Computational Electronics (2015) 335-339. [8] L.B. Kish, C.G. Granqvist, S.P. Khatri, F. Peper, Response to "Comment on ‘Zero and negative energy dissipation at information-theoretic erasure’", J. Computational Electronics (2015) 343-346. [9] J.D. Norton, All shook up: Fluctuations, Maxwell’s demon and the thermodynamics of computation, Entropy (2013) 4432–4483. [10] W. Porod, R.O. Grondin, D.K. Ferry, Dissipation in computation, Phys. Rev. Lett. ,52