Gate-Sensing Charge Pockets in the Semiconductor Qubit Environment
X. G. Croot, S. J. Pauka, H. Lu, A. C. Gossard, J. D. Watson, G. C. Gardner, S. Fallahi, M. J. Manfra, D. J. Reilly
GGate-Sensing Charge Pockets in the Semiconductor Qubit Environment
X. G. Croot, S. J. Pauka, H. Lu, A. C. Gossard, J. D. Watson,
3, 4
G. C. Gardner,
5, 4
S. Fallahi,
3, 4
M. J. Manfra,
5, 3, 6, 4 and D. J. Reilly †
1, 7 ARC Centre of Excellence for Engineered Quantum Systems,School of Physics, The University of Sydney, Sydney, NSW 2006, Australia. Materials Department, University of California, Santa Barbara, California 93106, USA. Department of Physics and Astronomy, Purdue University, West Lafayette, IN 47907, USA. Birck Nanotechnology Center, Purdue University, West Lafayette, IN 47907, USA. Station Q Purdue, Purdue University, West Lafayette, IN 47907, USA. School of Materials Engineering and School of Electrical and Computer Engineering,Purdue University, West Lafayette, IN 47907, USA. Microsoft Corporation, Station Q Sydney, The University of Sydney, Sydney, NSW 2006, Australia.
We report the use of dispersive gate sensing (DGS) as a means of probing the charge environ-ment of heterostructure-based qubit devices. The DGS technique, which detects small shifts inthe quantum capacitance associated with single-electron tunnel events, is shown to be sensitive topockets of charge in the potential-landscape likely under, and surrounding, the surface gates thatdefine qubits and their readout sensors. Configuring a quantum point contact (QPC) as a localisedemitter, we show how these charge pockets are activated by the relaxation of electrons tunnellingthrough a barrier. The presence of charge pockets creates uncontrolled offsets in gate-bias and theirthermal activation by on-chip tunnel currents suggests further sources of charge-noise that lead todecoherence in semiconductor qubits.
The pristine, two-dimensional (2D) interface createdin the epitaxial growth of a semiconductor heterostruc-ture underpins much of modern mesoscopic physics andserves as a foundation for hosting quantum information,encoded in the spin-state of electrons [1] or parity of Ma-jorana zero-modes [2]. Despite their near-perfect crys-tallinity [3], hetero-interfaces still contain unaccountedsources of charge noise that limit the performance ofqubit devices [4, 5]. Even the presence of static, but un-intentional, charges in the material is problematic, sinceeach qubit then requires uniquely-tuned gate voltages tocompensate the offset-charge from the disorder potential[6]. For semiconductor quantum systems, identifying andsuppressing all sources of charge-offset and noise is essen-tial if qubits are to be scaled-up into dense arrays underautonomous control.Directly probing trapped-charge and inhomogeneitiesin the potential-landscape has long-posed a challenge forstandard transport measurements, requiring alternativemethods such as scanned-probe techniques [7] that can,for instance, image electron-hole puddles [8] at the sur-face of materials such as graphene [9]. Puddles of chargehave also been detected by measuring velocity-shifts inthe propagation of surface acoustic waves in low-density2D systems [10] or via the use of capacitive-bridges [11]and local electrometers [12].In this Letter, we exploit the recently-pioneered tech-nique of dispersive gate sensing (DGS) [13] to probe the2D potential-landscape of qubit devices in search of un-accounted sources of charge-offset and noise that leadsto qubit dephasing [4, 14]. By sensing small shifts in thequantum capacitance of a surface gate, DGS can directlydetect weakly-bound charge that accumulates in pockets associated with local minima in the interface potential.The presence of trapped charge manifests as a rapidly-oscillating signal with gate voltage in the dispersive re-sponse of the sensor, consistent with Coulomb blockadefrom large, shallow quantum dots that are inadvertentlyformed by inhomogeneities in the potential at low density[15].Unlike highly-localised charge-sensing measurementsbased on quantum point contacts (QPCs) [16] or sin-gle electron transistors (SETs) [17], the DGS techniqueis able to probe charge pockets that accumulate under,or surrounding the entire perimeter of a gate electrode.We further investigate how such pockets are activatedby the emission of phonons associated with transportthrough a proximal QPC tunnel barrier. Beyond en-abling an estimate of the pocket charging energy, thesemeasurements show how the potential-landscape is per-turbed by the routine electrical readout and operationof the qubits, likely contributing to the non-markoviannoise of the semiconductor qubit environment.Turning to the details of our experiments, Fig. 1(a)shows three separate GaAs/AlGaAs devices with distinctgate configurations defined using electron beam lithog-raphy and TiAu metalization. The growth of the het-erostructure material spans separate molecular beam epi-taxy machines, and each device has been examined overmultiple cooldowns and in different dilution refrigerators.The devices are also different in terms of their carrierdensity, mobility, and depth of the 2DEG from the sur-face (for details see the caption of Fig. 1). In the caseof device 3, the TiAu gate electrodes are separated fromthe GaAs by an 8 nm insulating barrier of hafnium oxide(HfO), deposited using atomic layer deposition. Devices a r X i v : . [ c ond - m a t . m e s - h a ll ] J un (a) Device 1G1 G2G3 G4 G5G7G6 1 μ m (e) rf dc (d)
830 870850f [MHz]-20-25-30-35 S [ d B ] O1 O2 G1 G2 G3 G4 G5 1 μ mDevice 3O1 O2Device 2G1 G2 G3 G4 G5 G7G8G9G6G10 1 μ m O1O2 (b) (c) C = C g +C q C p L res LC bias tee
220 nH0.2 pF
G1 = -290 mVG1 = -590 mVG1 = -990 mV (f)
FIG. 1. (a-c) False-coloured micrographs of the three de-vices examined. Each device is fabricated from a uniqueGaAs/AlGaAs heterostructure with mobilities of 3.9, 0.44,and 2.4 × cm /V s , and densities 1.2, 2.4, and 1.5 × cm − , and 2DEG depths of 91 nm, 110 nm, and 91 nm fordevice 1, 2, and 3 respectively. White crossed boxes indicateohmic contacts. Resonators, required for dispersive gate sens-ing, are indicated by the inductor symbols, with full circuitshown in (d), including parasitic capacitance C p and classicalgate capacitance C g . (e) Cartoon illustrating charge pocketsthat give rise to closely spaced Coulomb blockade oscillationsin the DGS readout signal. (f) shows the frequency responseof a typical resonator (attached to gate G1 of device 1) as thegate is biased from -290 mV to -990 mV. LC tank circuits to enable dispersivereadout using rf-reflectometry [13, 19]. In this configu-ration, the capacitive component of the resonator com-prises both parasitic C p and quantum C q contributions,as shown in Fig. 1(d). A typical response of a resonatorwith frequency, shown in Fig. 1(f), depends strongly onthe gate voltage which alters the quantum capacitance inthe region of the gate electrode. With all other gates heldat 0 mV, stepping gate G1 from low bias to a bias thatfully depletes the 2DEG underneath the gate, shifts theresonant frequency (or phase response of the resonator)as the reactance of the circuit changes. For subsequentfigures, this phase response is detected by mixing-downthe reflected rf-carrier to baseband, yielding a voltage V DGS proportional to the change in resonator reactance.The phenomenology of our measurements is capturedin the cartoon of Fig. 1(e), which depicts a surface-gate biased to partially deplete the electron gas. Asthe electron density is reduced, the homogeneous 2DEG (a)
Device 1, G3 = -320 mV -150-350 -300-400-500 -350-450 -300-400-500 -350-450 G [ m V ] G5 [mV] G5 [mV] (c) -100-300 G [ m V ] -200-300 G [ m V ] V DGS [a.u] -300-400-500 -350-450
G5 [mV] -300-400-500 -350-450
G5 [mV] d V DGS / d V [ a . u ] (d) d V DGS / d V [ a . u ] -150-350 G [ m V ] (b) G3 = -360 mV
G1 G5 G1 G5G2 G5 G4 G5
Dispersive Sensorx-axis Gatey-axis GateActive GateInactive Gate
FIG. 2. (a) and (b) Complex, oscillatory pattern in theDGS response for device-1, as a function of gates G1 and G5,adjusting G3 by 40 mV between (a) and (b). This patterndoes not resemble a typical DGS signal for a quantum dot.(c) and (d) Derivative of V DGS with respect to gate bias, nowas a function of G2 and G4. Active gates are held at constantpotential and inactive gates at zero (see legend in (d). breaks-up into shallow puddles of charge, separated bytunnel barriers. The spatial distribution of such puddlesis well-understood [12, 15] to reflect the configuration ofpartially-ionized silicon donor sites in the AlGaAs, sur-face charge arrangement, and crystal disorder at the het-erostructure interface.As the gate bias is varied, the presence of thesedisorder-induced charge pockets leads to tunnelling tran-sitions which can be detected with the dispersive gatesensing technique. Figure 2 presents representative datasets in which the response of the gate-sensor exhibitsoscillatory patterns under various configurations of thedc gate bias (see caption for detailed explanation). Al-though the particular gate-pattern was designed to pro-duce quantum dot qubits with tunnel-coupling to thesource-drain reservoirs, for the present study we inten-tionally do not bias the gates to values that would typ-ically form a quantum dot. Focusing on device-1, Fig.2(a) shows the response of the gate-sensor V DGS as afunction of the gates G1 and G5, with the other gatesheld at constant bias. In this regime the sensor responseexhibits a complex pattern of lines that do not resemblethe signal expected for an intentional quantum dot [13].Instead, the pattern of lines changes amplitude, period,and slope with gate-bias. A small variation in the biasof G3 dramatically alters the pattern [see Fig. 2(b)], anddemonstrates that the signal originates from the electrongas.We acquire and average data-sets using standard re- (d)
Device 3 (a)
Device 2 -440-520 0-200-400-600 0-200-400
G3 [mV] G6 [mV] G [ m V ] -400 G5 [mV] -800-1200-1600-2000 G [ m V ] -1850-2050 G [ m V ] -1850-2050 Low gate bias (c) (e) V DGS [a.u] V DGS [a.u]
High gate bias
G4 G6G4G4G5G4G5 (b) -100-200-300
G3 [mV] G3 -480-460-500 FIG. 3. (a) DGS response for device-2, as a function of biason G3 and G4, with G1, G2 and G6 held at 0 V to ensurethat a quantum dot is not intentionally formed. (b) Closeinspection of (a) reveals an avoided crossing. (c) DGS signalas a function of G6 and G4. The response is insensitive to thebias applied to G6. (d) For device-3, a comparison betweenthe DGS response when all gate are biased to low negativegate voltages, and (e), at high negative gate voltages, wherethe oscillations are suppressed. flectometry techniques [13, 16]. To make it easier tosee the fine details in these complex patterns, we plotthe derivative of the sensing signal with respect to gatevoltage, as shown in Fig. 2(c) and 2(d), now as func-tion of G2 and G5. Interpreting the lines in gate-spaceas charge transitions between charge pockets, we notethat the slope of the lines with respect to the gate-biascannot correspond to the formation of the usual quan-tum dot between the gates. Rather, these transitionspresumably arise from charge motion directly under andsurrounding the gate electrodes, but sufficiently close tothe central region of the device to be sensitive to smallvariations in any gate bias. Further evidence that this isthe case is given by the frequency of the oscillations withrespect to gate voltage, indicating that the capacitancebetween the gate and charge pocket is roughly a factor of5 larger than the gate-capacitance typically observed forintentional quantum dots [1]. Although not completelyunderstood, we suggest that the curvature and changingslope of the lines relates to the complicated shape of thecharge pocket and its response to strong fringing-fieldsfrom the gates, as well as the distance, orientation, anddirection of tunnelling, relative to the gate-sensor [12].In what follows, we pursue this charge-pocket inter-pretation as an explanation for the complex patterns observed with gate sensing, gathering further evidencefrom measurements on additional devices. Switching todevice-2, for instance, we again observe oscillatory struc-ture in the gate sensor response, as shown in Fig. 3(a).In an effort to further pinpoint the source of this sig-nal we limit the gate bias to three gates, holding theother gates at zero to ensure that a quantum dot can-not be formed in the central region. Never-the-less, evenwith 3 gates, close inspection of the data in Fig. 3(a)[see zoomed region in Fig. 3(b)] reveals the presence ofavoided-crossings in the DGS signal and provides addi-tional evidence that we are detecting interacting chargepockets in the potential landscape, rather than the usual,gate-defined quantum dots. Of interest, applying a biasto the upper gate, G
6, is seen to have no effect on thedata, as shown in Fig. 3(c).The strongest evidence that the oscillatory patterns areassociated with charge pockets in the potential landscapeis presented in Fig. 3(d) and (e), with data taken nowon yet a third device, (device-3). Here we compare thegate-sensor response, first with all other gates at low bias[Fig. 3(d)], and then with all other gates set to highlynegative voltages, well past the typical bias required todeplete the electron gas. The effect of this high gate-biasregime, which expels trapped charge under the gates andin the surrounding perimeter of the electron gas, is tosuppress nearly all traces of the oscillatory response inthe gate sensor. Finally, we note that in the case ofdevice-3, the surface gates are insulated from the GaAsby a thin layer of HfO. Despite the presence of the HfO,the oscillatory structure in the readout persists (at lowgate voltage), discounting explanations based on surfacecharge-states or gate-leakage, which would otherwise bemodified by the addition of an insulating layer.The formation of charge pockets under and betweenthe gate-electrodes has potential implications for under-standing the qubit noise environment, as well as explain-ing the spread in gate pinch-off voltages that stem fromuncontrolled off-set charges. In this context it is worthnoting that heterostructure qubits are typically definedusing gate biases that produce only a partial depletion ofthe 2DEG, almost guaranteeing the formation of chargepockets. We next address whether these pockets can bedisturbed by on-chip operations, such as qubit controlor readout when using a proximal QPC or SET chargedetector.Taking device-2 as an example, we bias gates G7 andG5 to configure a QPC readout sensor, partitioning thesource and drain reservoirs that connect ohmic contactsO1 and O2. At low gate bias, with the QPC open andfully transmitting, the presence of a current between O1and O2 has little effect on the oscillations in the DGS sig-nal. When the QPC is partially closed however, the pres-ence of a source-drain bias, V SD , leads to a suppression inthe oscillatory signal from the gate sensor, as indicated bycomparing Figs. 4(a) ( V SD = 0) to Fig. 4(b) ( V SD = -2 -420-440-460-480-500 G [ m V ] -520 0-500-1000-1500 G7 [mV] (a) Bias = 0 mV (b)
Bias = -2.0 mVDevice 2 V
DGS [a.u]0 Temperature [mK]200 400 600 8000.00.40.80.20.61.0
FFT M ag [ no r m ] (c) -2 -1 0 21V SD [mV] (e) In O1, out O2-400-800-1200-1600 G [ m V ] FFT Mag [norm] (f)
In O1, out O2-2 -1 0 21V SD [mV]-400-800-1600 G [ m V ] dI/dV [Sx10 -6 ] (d) G7 = -500 mVG7 = -800 mV G7 = -1100 mV -2 -1 0 21V SD [mV]0.00.40.80.20.61.0 FFT M ag [ no r m ] G4 G7 V SD O1 O2
34 2 15
FIG. 4. Dependence of the DGS oscillations on nearby QPCtransport for Device-2. (a) DGS response as a function ofG7 and G4, without a source-drain bias across the QPC. (b)DGS oscillations with QPC bias of V SD = - 2.0 mV. The ver-tical line feature near - 300 mV is associated with the QPCgates depleting the electron gas. (c) Temperature dependenceof the DGS oscillations, as quantified by their Fourier ampli-tude, normalised with respect to their amplitude at base tem-perature of ∼
20 mK (see supplemental materials for detailsof the FFT analysis). Line is a guide to the eye. (d) Differ-ential conductance of the QPC as a function of source-drainbias V SD . (e) Amplitude of the DGS oscillations, quantifiedas the magnitude of their Fourier component, as a functionof gate bias G7 and V SD . (f) Horizontal 1D line-cuts of thedata in (e) at positions indicated by dashed lines. mV). The oscillations are restored when the QPC is fullypinched-off. This sensitivity to the partial transmissionof the QPC suggests that the charge pockets are acti-vated by the emission of phonons with flux proportionalto the QPC partition current, and energy proportional tothe potential difference between source and drain. Rais-ing the temperature of the cryostat above T ∼
200 mK isalso found to strongly suppress the amplitude of oscilla-tions in the DGS signal, as shown in Fig. 4(c) [details insupplemental material], presumably as the thermal en-ergy becomes comparable to the charging energy of thepocket. Consistent with a large gate-capacitance that produces rapid oscillations in the DGS signal, we extracta charging energy from the temperature data that is oforder a few 10s of µ eV, an order-of-magnitude smallerthan the typical charging energies measured for inten-tional, gate-defined quantum dots used as a qubits [1].Returning to the effect of the QPC sensor on the pock-ets, we make a more detailed examination by first mea-suring the QPC differential conductance, as shown in Fig.4(d). As is the case when charge-sensing, the QPC isvery close to pinch-off, with an appreciable conductanceonly appearing at low gate bias and high V SD . Next, wequantify the amplitude of the DGS oscillations by tak-ing their fast Fourier transform (FFT) over a window ofdata as a function of V SD and gate-bias, G7, as shownon the intensity axis in Fig. 4(e) and as 1D line-cuts inFig. 4(f) [see supplemental material for details of FFTanalysis]. In this way we are making use of the DGS sig-nal from the pockets to locally-probe the back-action ofthe QPC, arising from the tunnelling of electrons fromsource to drain [20, 21]. These electrons emit phononsas they relax and thermalize in the reservoir, which thenquench the small charging energy of the charge pockets.We draw attention to the appearance of step-like fea-tures that occur in the FFT-data [shown with arrows inFig. 4(f)]. The extent to which these step-like featuresarise from the one-dimensional sub-bands of the QPC, orthe discrete energy spectrum of the charge pockets, is anopen question.Having now made the case for charge pockets as theexplanation for the complex oscillatory signals observedwith dispersive gate sensing, we turn to further discusstheir origin. In this regard, it is worth noting that suchoscillatory patterns in gate-space are very rarely observedusing QPC or SET charge sensors. On the other hand, wefind they can always be found using DGS, even across dif-ferent heterostructures (with varying mobility and den-sity) and distinct gate patterns. Considering that theoscillations, detected by the gate incorporating the res-onator, can easily be modulated by small voltages onneighbouring gates, we conclude that the location of thepockets is within a few microns from the tip of the gates.Given their small charging energy, it is likely that suchpockets correspond to shallow, micron-scale, quantumdots that form directly under the gates as the electrongas is partially depleted. In such a scenario, screeningfrom the gate metal presumably makes them difficult todetect using standard charge sensing, in contrast to DGSwhere the pockets contribute directly to the quantum ca-pacitance of the resonator.Finally, we draw attention to the fact that theseshallow pockets are easily perturbed by proximal QPCtransport, and considering that qubits are operated by rfgate-pulses or microwaves, it is likely that their presencecan lead to charge fluctuations in the qubit environment.The extent to which these pockets can be alleviated viathe use of bi-polar, induced electron device structures[22, 23] is an open direction for mitigating noise andoffset charges in semiconductor qubits. † Corresponding author, email:[email protected] research was supported by Microsoft Station-Q,the US Army Research Office grant W911NF-12-1-0354,the Australian Research Council Centre of ExcellenceScheme (Grant No. EQuS CE110001013). We thankA.C. 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