High-Performance HZO/InAlN/GaN MIS-HEMT with fT/fmax of 155/250 GHz
Abstract —Scaling of GaN high-electron-mobility transistors (HEMTs) usually increases gate leakage current and deteriorates breakdown characteristic, limiting the maximum drain current and output power density. These bottlenecks can be circumvented by inserting a dielectric material under the gate of HEMTs. Doped HfO is an excellent dielectric material but unexplored so far as the gate material of HEMTs for high-speed device application. Here we demonstrate that Zr-doped HfO (HZO)-gated InAlN/GaN metal-insulator-semiconductor (MIS) HEMTs exhibit remarkable properties. The device with a gate length ( L g ) of 50 nm exhibits maximum drain current ( I d,max ) of 2.15 A/mm, a transconductance ( g m ) peak of 476 mS/mm, an on/off current ratio ( I on / I off ) of 9.3 × 10 , a low drain-induced barrier lowing (DIBL) of 45 mV/V. RF characterizations reveal a current gain cutoff frequency ( f T ) of 155 GHz and a maximum oscillation frequency ( f max ) of 250 GHz, resulting in a ( f T × f max ) of 197 GHz. The breakdown voltages (BV) of 35 V and 72 V is achieved on the L g = 50 nm devices with source-drain distance ( L sd ) of 0.6 and 2 µm ( f T of 155 and 110 GHz), resulting in high Johnson’s figure-of-merit (JFOM = f T ×BV) of 5.4 and 7.9 THz∙V, respectively. These properties, particularly the high f T / f max and JFOM are highly desirable for the millimeter-wave power applications, demonstrating the great technological potential of HZO/InAlN/GaN MIS-HEMTs. Index Terms —Hf Zr O ; GaN MIS-HEMT; f T / f max ; breakdown voltage; JFOM. I. I NTRODUCTION aN-based high-electron-mobility transistors (HEMTs) indicate great potential for RF and millimeter-wave power applications [1-5]. To date, excellent current gain cutoff frequency ( f T ) and maximum oscillation frequency ( f max ) have been demonstrated on GaN HEMTs with device scaling [6-9]. However, device scaling usually causes high gate leakage current and deteriorates breakdown voltage (BV), thus limiting the maximum drain current and output power density. The gate dielectric can suppress the leakage current and enhance the breakdown characteristic. Therefore, the introduction of gate dielectric on GaN metal-insulator-semiconductor HEMTs (MIS-HEMTs) could lead to further improvement of the device performance for high-speed and high-power applications. For high-speed device application, different dielectric materials (Al O [10-19], HfO [20-22], SiN [23-27], SiO [28], TiO [29], MgCaO [30], ZnO [31], et al .) have been investigated as the gate dielectric in GaN MIS-HEMTs. The relevant device performance, such as maximum drain current ( I d,max ) of 2.4 A/mm [32], on/off current ratio ( I on / I off ) of 5 × 10 This work was supported in part by the NASA International Space Station under Grant 80NSSC20M0142, and in part by Air Force Office of Scientific Research under Grant FA9550-19-1-0297 and Grant FA9550-21-1-0076. [30], transconductance ( g m ) of 653 mS/mm [11], f T / f max of 190/300 GHz [20], and Johnson’s figure-of-merit (JFOM) of 10.8 THz∙V [23] has been demonstrated. Although there is still a gap between MIS-HEMTs and HEMTs, the advantages of MIS-HEMTs have been shown. In this study, we report the first demonstration of the Hf Zr O (HZO) as the gate dielectric for GaN-based high-speed MIS-HEMTs. Key device performance parameters, including high I d,max , low drain-induced barrier lowing (DIBL) , high f T / f max and JFOM, are simultaneously achieved on the HZO/InAlN/GaN MIS-HEMTs, suggesting their great potential for high-speed applications. II. EXPERIMENT
Fig. 1 . Key process flow for the fabricated HZO/InAlN/GaN HEMT: (a) material growth, (b) mesa isolation, (c) ohmic contact deposition and annealing, (d)
HZO gate dielectric deposition, (e) gate deposition, and (f) pad formation.
Fig. 1 shows the key process flow of the fabricated HZO/InAlN/GaN MIS-HEMT. The growth of epitaxial structures is performed with metalorganic chemical vapor deposition (MOCVD) on a 4-inch high-resistance Si substrate. The epitaxial layer consists of a 2-μm undoped GaN buffer layer, a 4-nm In Ga N back-barrier layer, a 15-nm GaN channel layer, a 1-nm AlN interlayer, a 5-nm lattice-matched In Al N barrier layer, and a 2-nm GaN cap layer. Device mesa isolation was carried out with Cl -based inductively coupled plasma (ICP) etching with an etch depth of ~300 nm. Then ohmic contact was formed with Ti/Al/Ni/Au deposition and annealing at 850˚C for 40 s. Then HZO was deposited as the gate dielectric and passivation layer by using plasma-enhanced atomic layer deposition (PEALD) at 150°C. P. Cui and Y. Zeng are with the Department of Electrical and Computer Engineering, University of Delaware, Newark, DE, 19716, USA (e-mail: [email protected]). H. Chen and J. Q. Xiao are with the Department of Physics and Astronomy, University of Delaware, Newark, DE 19716, USA.
Peng Cui, Hang Chen, John Q. Xiao, and Yuping Zeng
High-Performance HZO/InAlN/GaN MIS-HEMT with f T / f max of 155/250 GHz G etrakis(dimethylamino)hafnium (TDMAH), Bis(methyl-η5−cyclopentadienyl)methoxymethylzirconium (ZRCMMM), and oxygen are used as Hf, Zr, and O source, respectively. The film was grown in a Hf: Zr ratio of 1:1 by alternating cycles of TDMAH, O , ZRCMMM, O . The alternating cycles were repeated 30 times for 2-nm HZO growth. These steps were followed by T-shaped gate fabrication with electron beam lithography and Ni/Au deposition. Finally, HZO on the pad was removed by dipping the samples in HF solution (HF: H O = 1: 9) for 30s. Devices with source-drain distance ( L sd ) of 2 ~ 0.6 µm, gate length ( L g ) of 50 ~ 150 nm, and gate width ( W g ) of 20 × 2 µm were fabricated. III. R ESULTS A ND D ISCUSSION
Hall measurements were carried out on the InAlN/GaN heterostructure before and after HZO deposition. Before HZO deposition, the electron density ( n ) of 1.71 × 10 cm -2 and electron mobility ( µ ) of 1663 cm /V∙s are obtained, an indication of a good InAlN/GaN heterostructure. After HZO deposition, n of 2.24 × 10 cm -2 and µ of 1613 cm /V∙s are determined. The increased n presents a good passivation effect on the material surface [33, 34], and the negligible change in µ means that the electron mobility is not degraded with the dielectric deposition. Fig. 2(a) depicts the diode curves, which show a ~ 4 order decrease of gate leakage current at a gate-source voltage ( V gs ) of -10 V with HZO deposition. Fig. 2(b) presents the extracted interface trap density ( D it ) of the HZO/InAlN/GaN diode by using the conventional conductance method [35, 36]. The inset of Fig. 2(b) plots the measured and fitted G P / ω versus ω ( G P is the measured conductance and ω is the radial frequency [35, 36]). The device shows a low D it of 1~3 × 10 eV -1 ∙cm -2 . The Fat-FET (HZO/InAlN/GaN with L g of 96 µm and L sd of 100 µm) is fabricated for low-field mobility extraction [37, 38]. Fig. 2(c) shows the measured capacitance and n at a 1MHz frequency of the Fat-FET. Fig. 2(d) exhibits low-field mobility (at V ds = 0.1 V) versus n of the Fat-FET, indicating a peak mobility of 1627 cm /V∙s. All these properties unequivocally demonstrate that HZO a strong candidate as a gate dielectric for GaN MIS-HEMTs. -20 -15 -10 -5 0 510 -13 -11 -9 -7 -5 -3 -1 -6 -4 -2 0 2 with HZO without HZO V gs (V) I g ( A / mm ) ~ 10 (a) E C -E T (eV) D i t ( e V - c m - ) V gs = -3.75 V V gs = -3.7 V V gs = -3.65 V V gs = -3.6 V V gs = -3.55 V V gs = -3.5 V G p / w ( µ F / c m ) w (s -1 ) (b)V gs (V) C ( - F / c m ) C 1 MHz n d ( c m - ) n (c) n (cm -2 ) ( c m / V s ) /V.s (d) Fig. 2(a) I g - V gs curves for the InAlN/GaN and HZO/InAlN/GaN diode. (b) Extracted D it as a function of E c - E T . Insert: Measured and fitted G P / ω versus ω . (c) Capacitance (C, left) and electron density ( n , right) versus V gs . (d) Extracted low-field mobility versus n with a peak value of 1627 cm /V∙s on an HZO/InAlN/GaN MIS-HEMT with L g = 96 µm and L sd = 100 µm. Fig. 3(a) shows the typical output characteristic of the HZO/InAlN/GaN MIS-HEMT ( L g = 50 nm, and L sd = 0.6 µm), depicting an on-resistance ( R on ) of 1.41 Ω∙mm. The transfer characteristic and transconductance ( g m ) of the same device are shown in Fig. 3(b) . A maximum drain current ( I d,max ) of 2.15 A/mm and a g m peak of 476 mS/mm are observed. The transfer and gate current characteristics in semi-log scale at V ds = 10 V and 1 V ( Fig. 3(c) ) exhibit a low leakage current, an on/off current ratio ( I on / I off ) of 9.3 × 10 , a subthreshold swing ( SS ) of 130 mV/dec, and a drain-induced barrier lowing (DIBL) of 45 mV/V at I d = 10 mA/mm. With gate dielectric deposition, the low DIBL confirms insignificant short-channel effects (SCEs) with an aspect ratio of ~5 [1, 39]. Fig. 3(d) shows the off-state three-terminal breakdown characteristics of the L g = 50 nm HZO/InAlN/GaN MIS-HEMTs. The breakdown voltage (B V ) of 72 V and 35 V is demonstrated on the device with L sd of 2 and 0.6 µm, respectively. -8 -6 -4 -2 0 2 40.00.51.01.52.02.5-10 -8 -6 -4 -2 0 2 410 -13 -11 -9 -7 -5 -3 -1 -9 -7 -5 -3 -1 V ds (V) I d ( A / mm ) R on =1.41 mmV gs = -7 V to 3 V, in 1 V step (a) V gs (V) I d ( A / mm )
476 mS/mm 2.15 A/mm V ds = 10 V I d (b) g m ( m S / mm ) g m V ds = 10 V V ds = 1 V V gs (V) I d , I g ( A / mm ) (c) I g SS: 130 mV/dec I d I on /I off : 9.3 × 10 DIBL: 45 mV/V V ds (V) V gs = -10V I d , I g ( A / mm ) (d) I g I d I d I g L sd = 0.6 µmBV = 35 V L sd = 2 µmBV = 72 V Fig. 3 (a)
Output characteristic, (b) transfer characteristic in linear scale (left), transconductance ( g m , right), and (c) transfer and gate current characteristics in semi-log scale at V ds of 10 V and 1V of the L g = 50 nm HZO/InAlN/GaN MIS-HEMT. (d) Off-state three-terminal breakdown characteristics for the L g = 50 nm HZO/InAlN/GaN MIS-HEMTs with L sd of 2 and 0.6 µm, respectively. The microwave characteristics of the HZO/InAlN/GaN MIS-HEMTs are characterized from 1 to 65 GHz using an Anritsu MS4647B vector network analyzer. By using the de-embedded S-parameters, the high-frequency gains of the devices are extracted.
Fig. 4(a) plots the measured short-circuit current gain (|h | ), Mason’s unilateral gain (U), maximum-stable-gain (MSG), and stability-factor (k) of the MIS-HEMT with L g of 50 nm and L sd of 0.6 µm at V ds = 10 V and V gs = -3.8 V. f T / f max of 155/250 GHz is obtained by extrapolation of |h | and U with a -20 dB/dec slope, resulting in f T × L g of 7.75 GHz∙µm and ( f T × f max ) of 197 GHz. f T / f max versus I d is also measured and plotted in Fig. 4(b) . The classical 16-element equivalent-circuit model is used for the device, as shown in
Fig. 4(c) [40, 41] . Based on the model, the device extrinsic and intrinsic parameters are extracted in
Fig. 4(d) and the simulated f T,model / max,model of 156/249 GHz are consistent with the measured results [40-42]. Fig. 4 (e) and (f) show the measured f T / f max as a function of L g and L sd , respectively. f T for the L g = 50 nm devices with L sd of 2 and 0.6 µm is 110 and 155 GHz (BV of 72 V and 35 V), resulting in the high Johnson’s figure-of-merit (JFOM = f T × BV) of 7.9 and 5.4 THz∙V, respectively. Fig. 5(a) and (b) show the f max and B V versus f T benchmark for the presented devices against state-of-the-art GaN MIS-HEMTs on SiC, Sapphire, Si, and GaN substrates [10-32]. The HZO/InAlN/GaN MIS-HEMTs on Si in this work exhibit excellent device performance on high f T / f max and BV simultaneously, indicating the outstanding potential for high-speed and high power applications. |h | Frequency (GHz) V ds = 10 VV gs = -3.8 V G a i n s ( d B ) U f T = 155 GHz f max = 250 GHzMSG K (a) K -f ac t o r f T f max f T , f m ax ( G H z ) I d (A/mm) (b)(c)(d) f T f max L sd (µm) f T , f m ax ( G H z ) L g = 50nm Extracted ParametersC gs = 497 fF/mm C gd =109 fF/mmC ds = 246 fF/mm R i = 0.17 ∙mmG m = 535 mS/mm G = 64 mS/mmR s = 0.39 ∙mm t = 1.02 psR g = 0.37 ∙mm f T, model =156 GHzR d = 0.46 ∙mm f max, model =249 GHz (f) f T f max L g (nm) f T , f m ax ( G H z ) (e) Fig. 4 (a)
High-frequency gains (|h | , U and MSG), stability factor (k), (b) f T / f max versus I d , (c) small-signal equivalent-circuit model; and (d) the extracted intrinsic parameters of the L g = 50 nm HZO/InAlN/GaN MIS-HEMT. (e) and (f) f T / f max of HZO/InAlN/GaN MIS-HEMT as a function of L g and L sd , respectively. ULM '32ThermalOxide
NICT '27SiN on SiC on Sapphire on Si on GaN This work on Si f m ax ( G H z ) f T ( GHz )
100 150 200 250(f T × f max ) (GHz) NICT '26SiNIntel '20Al O +HfO HRL '10Al O Intel '22Al2O3+HfO NTU '12Al O NRL '21HfO HKUST '24SiNSAV '15Al O NICT '25SiN
NCTU '11Al O NRL '23SiN Purdue '30MgCaOCNU '14Al O (a) on SiC on Saphire on Si on GaN This work on Si B V ( V ) f T (GHz) NRL '23SiNNRL '23SiN
NCTU '11Al O NRL '21HfO NICT '27SiN
HKUST '24SiNPKU '29TiO +NiONCKU '31ZnO NCKU '17Al O FCU '19Al O CAS '18Al O HKUST '16Al O IMEC '13Al O Intel '22Al O +HfO T × B V (THz V)5 10 (b)
Fig. 5 (a) f max and (b) BV versus f T benchmark for the presented devices (HZO/InAlN/GaN MIS-HEMTs on Si) against state-of-the-art GaN MIS-HEMTs on SiC, Sapphire, Si, and GaN substrates. IV. C ONCLUSION
In summary, by using HZO as the gate dielectric, the L g = 50 nm InAlN/GaN MIS-HEMT presents a high performance with I ds,max of 2.15 A/mm, g m peak of 476 mS/mm, I on / I off of 9.3 × 10 , DIBL of 45 mV/V, f T / f max of 155/250 GHz, and ( f T × f max ) of 197 GHz. The devices with L sd of of 2 and 0.6 µm present high JFOM of 7.9 and 5.4 THz∙V, respectively. The simultaneously achieved excellent cutoff frequencies and breakdown characteristics indicate the great potential of the HZO/InAlN/GaN MIS-HEMTs for RF and millimeter wave power applications. R EFERENCES [1] K. Shinohara, D. C. Regan, Y. Tang, A. L. Corrion, D. F. Brown, J. C. Wong, J. F. Robinson, H. H. Fung, A. Schmitz, and T. C. Oh, "Scaling of GaN HEMTs and Schottky diodes for submillimeter-wave MMIC applications,"
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