Limitations on counting in Boolean circuits and self-assembly
LLimitations on counting in Boolean circuits andself-assembly
Tristan Stérin
Hamilton Institute and Department of Computer Science, Maynooth University https://dna.hamilton.ie/tsterin/ [email protected]
Damien Woods
Hamilton Institute and Department of Computer Science, Maynooth University https://dna.hamilton.ie [email protected]
Abstract
In self-assembly, a k -counter is a tile set that grows a horizontal ruler from left to right, containing k columns each of which encodes a distinct binary string. Counters have been fundamentalobjects of study in a wide range of theoretical models of tile assembly, molecular robotics andthermodynamics-based self-assembly due to their construction capabilities using few tile types,time-efficiency of growth and combinatorial structure. Here, we define a Boolean circuit model,called n -wire local railway circuits, where n parallel wires are straddled by Boolean gates, eachwith matching fanin/fanout strictly less than n , and we show that such a model can not count to2 n nor implement any so-called odd bijective nor quasi-bijective function. We then define a classof self-assembly systems that includes theoretically interesting and experimentally-implementedsystems that compute n -bit functions and count layer-by-layer. We apply our Boolean circuit resultto show that those self-assembly systems can not count to 2 n . This explains why the experimentallyimplemented iterated Boolean circuit model of tile assembly can not count to 2 n , yet some previouslystudied tile system do. Our work points the way to understanding the kinds of features requiredfrom self-assembly and Boolean circuits to implement maximal counters. Theory of computation → Models of computation
Keywords and phrases
Algorithmic self-assembly, Boolean circuits, computational complexity.
Funding
Tristan Stérin : Research supported by European Research Council (ERC) under theEuropean Union’s Horizon 2020 research and innovation programme (grant agreement No 772766,Active-DNA project), and Science Foundation Ireland (SFI) under Grant number 18/ERCS/5746.
Damien Woods : Research supported by European Research Council (ERC) under the EuropeanUnion’s Horizon 2020 research and innovation programme (grant agreement No 772766, Active-DNAproject), and Science Foundation Ireland (SFI) under Grant number 18/ERCS/5746.
Acknowledgements
We thank Jarkko Kari for pointing us to key results on Boolean circuits andfunctions. We thank Christopher-Lloyd Simon for introducing us to the theory of ramificationdegrees and their application to quasi-bijections. We thank Constantine Evans for helpful discussionson self-assembled counters, and Dave Doty and Erik Winfree for discussions on IBCs over the years.
Both from the theoretical and the experimental points of view, counting is considered afundamental building block for algorithmic self-assembly. On the theoretical side, it wasestablished early in the field of algorithmic self-assembly that counters are a tile-efficientmethod to build a fixed-length ruler. Once one can make a ruler, it can be used to (efficiently)build many larger geometric shapes. For example, using an input structure containing O (log n )square tile types, an additional (mere) constant number of tile types can then be used to firstmake a ruler and then an n × n square. Or by using a single-tile seed, a size Θ(log n/ log log n ) a r X i v : . [ c s . ET ] M a y Limitations on counting in Boolean circuits and self-assembly (e) (a)(b) ... (c) ... (d) å Figure 1
A tile-based 63-counter in the 6-bit Iterated Boolean Circuit (IBC) model. In Section 5we prove there is no 6-bit IBC 64-counter. (a) Atomic force microscope image of a self-assembled DNAtile 63-counter. Starting from a seed structure on the left-hand side (not shown), DNA tiles attach togrow the assembled structure from left to right. 1-bits are labelled with yellow ‘circles’ (streptavidinprotein), 0s are unlabeled (brown). Scale bar 100 nm. Data taken from [29]. (b) Schematic showingintended assembled tiled structure. (c) Zoom-in detail of (b), showing the first (seed) layer with theinput bit sequence (from top to bottom) 111101, where yellow tile-glues denote 1 and brown denote0. (d) Abstract schematic of the 63-counter: the 6-bit input 111101 appears on the left, followedby 62 distinct sequences, followed by 111101 again on the right. (e) Zoom-in of attaching tiles onright-hand side of a partially assembled structure, the attachment of a tile computes a function fromtwo bits to two bits, and the entire tile set encodes the 63-counter algorithm. tile set can go on to build n × n square in optimal expected time Θ( n ) [23, 8, 1]. These ideaseasily generalise beyond squares to a wide class of more complicated geometric shapes [25].On some models, the combinatorial structure of tile/monomer-type efficient counters canbe “loose enough” to allow highly-parallel construction [8, 28], yet in others can be “tightenough” to enable large thermodynamically-stable structures [14]. Counters were also usedto build complex circuit patterns [9], universal constructions in self-assembly [12, 10], andas a benchmark for new self-assembly models [13, 21, 17, 22]. Hence, counters, and binarycounters in particular, are fundamental to the theory of algorithmic self-assembly. Experimentally, there has been a reasonable amount of effort dedicated to implementingcounters [2, 3, 15, 29]. An experimental piece of work [29] (Figure 1), defined a Booleancircuit model of self-assembly, called iterated Boolean circuits (IBCs), see Figure 2(a). Themodel was expressive enough to permit programming of a wide range of 6-bit computations,and physical enough to permit their molecular implementation using DNA self-assembly.When generalised beyond 6-bit inputs to arbitrary inputs of any length n ∈ N the model isTuring universal [29]. However, despite its computational capabilities, the authors of [29] didnot manage to find, by hand nor by computer search, any circuit that is a 2 n counter, or maximal counter meaning in the 6-bit case an iterated circuit that iterates through 2 = 64distinct bit strings before looping forever. Since programming requires some ingenuity, andsince the search space for these circuits is huge, it remained unclear whether such maximal In contrast though, it should be noted that there are efficient geometry-inspired, and cellular-automatainspired, constructions for building of shapes and or patterns that do not use counters [4]. Althoughthey are not as tile-type efficient as counters, they bring a more geometric, rather than counter-likeinformation-based, flavour to shape construction. There are 2 possible 6-bit IBCs, and that number goes down to around 10 when symmetries aretaken into account. . Stérin and D. Woods 3 binary counters were permitted by the model or not. In this paper we prove they are not,and more generally give similar results on a class of Boolean circuits called railway circuits and certain classes of self-assembly systems.Considering Boolean circuits, it is known since [26], in the context of reversible computing,that adding pass-through input bits (i.e. input bits that only copy their value to the ouput)to reversible Boolean gates prevent them from implementing odd bijections . It is essentiallythat result that will prevent railway circuits from implementing maximal bijective counters.However, other tools are needed to deal with quasi-bijective maximal counters which, weshow, is the only other family (besides bijections) of maximal counters. In Section 2, we define a Boolean circuit model called n -wire local railway circuits . An n -wire railway circuit consists of n wires that run in straight parallel lines, with gates thatstraddle multiple adjacent wires (see Figure 2(b)) such that each gate has its fanin equalto its fanout. Gates are local in the sense that no gate may straddle all n wires. There isno restriction on the depth of these circuits. Railway circuits are a generalisation of IBCsand allow more possibilities for gate placement and wiring between those gates, yet they arerestrictive enough to model a wide variety of self-assembly systems. Building on previouswork on reversible circuits [26, 30, 6] and the notion of ramification degree of a function[16, 5, 18], we show that n -wire local railway circuits cannot implement 2 n counters: (cid:73) Theorem 1.
For all n > , there is no local n -wire railway circuit that implements a n -counter. More generally we show that no n -wire railway circuit implements Boolean functions f : { , } n → { , } n that are odd bijections or odd quasi-bijections (these terms are definedin Section 2).We then apply these results to self-assembly in Section 5. We define a class of directedself-assembly systems that compute iterated/composed Boolean n -bit functions, layer-by-layer, and show that that class of self-assembly systems are simulated by railway circuits.Hence such systems cannot assemble maximal binary counters. This class includes n -bit IBCtile sets, hence we get: (cid:73) Theorem 2.
For all n ≥ , there is no n -bit IBC tile set that self-assembles a n counter. While the layer-by-layer class of tile sets is wide enough to include an experimentallyimplemented IBC tile set [29], and certain zigzag systems (see Section 5), we also find that,from a self-assembly point of view, it is quite a restrictive class. Indeed building maximalcounters is achievable through small, and quite reasonable, modifications to that class, which,in turn, highlight improvements that can be made to railway circuits to enable them tomaximally count. Hence, this paper outlines some design principles that one should notfollow when concerned with designing maximal binary counters. One take home message isthat in order to have an n -bit tile set that computes a maximal 2 n counter, layer-by-layer,then one should exploit some property that violates our notion of simulation by railwaycircuits: for example by having some tiles with fanout not equal to fanin. We defined n -wire local railway circuits to specifically model certain kinds of self-assemblysystems. We leave as future work to characterise the exact family of Boolean circuits for Limitations on counting in Boolean circuits and self-assembly x g x x g x x g x g g y y g y y g y y (a) x x x x x x y y y y y y g f C f g (cid:22) f g (cid:22) f g (cid:22) f g (cid:22) f g (cid:22) f g (cid:22) f g (cid:22) g g g g g g (b) Figure 2 (a) Iterated Boolean circuit (IBC) layer with inputs ( x , . . . , x ), Boolean gates( g , . . . , g ) and outputs ( y , . . . , y ). The circuit computes on a 6-bit circuit input by iterat-ing (repeating) this layer over and over. (b) A railway circuit that simulates a 6-bit IBC. The railwaycircuit uses 6 wires, is of (horizontal) width 7 and the decomposition of f C into 7 atomic componentsis shown with each component denoted f g (cid:22) , f g (cid:22) , etc. Black dots delimit sections. The railwaycircuit is local because none of its gates span all 6 wires. which Theorem 1 holds. That family is certainly larger than local railway circuits (forexample, it would presumably include railway circuits that have gates that straddle upto n − non-adjacent wires) and goes beyond the scope of the type of circuits disscussedin [26, 30, 6], but also provably does not contain the kinds of railway-like circuits thatsimulate the maximal 2 n counters from the self-assembly literature discussed in Sections 5.4.2and 5.4.3.Another direction is to find the most general class of self-assembly system for whichsomething like Theorem 2 or Theorem 38 holds. Classes of self-assembly systems that are nothandled by our techniques include both undirected systems (that exploit nondeterminismin non-trivial ways to produce multiple final assemblies) and systems that do not growin an obvious layer-by-layer fashion. This would include systems that vary their growthpattern depending on the state of a partially grown counter structure. One approach is toattempt to find a more general class of circuits than railway circuits that models such generalself-assembly systems. However, it seems that a different approach might be more profitableas it is not obvious how to map such systems to a clean Boolean circuit architecture.We leave as open work to explore how our results on self-assembly generalise to higher,even or odd, alphabet sizes beyond the binary alphabet explored here. Existing literature onreversible circuits offers pointers as they characterize the ability of local Boolean gates toimplement odd/even bijections when alphabet sizes are larger than two [7]. n -wire local railway circuits Let n, k ∈ N + .For X = { , , . . . , m − } and f : X → X let Im( f ) = { f ( x ) | x ∈ X } , denote the imageof f , and let, for a finite set Y , card( Y ) denote the cardinality of Y .An n -wire, width- k , railway circuit C is composed of n parallel wires divided into k sections each of width 1. Wires carry bits. A gate g is specified by the tuple ( s, i, j, f g )where s ∈ { , , . . . , k − ≤ i, j < n , and where . Stérin and D. Woods 5 f g : { , } j − i +1 → { , } j − i +1 is an arbitrary total function called the gate function of g .The gate g = ( s, i, j, f g ) is of width 1, is located in section s , and there is exactly one gateper section. The gate g applies its function f g to the section’s input wires between i and j (included). We use the notation f g (cid:22) to refer to the extension of f g from { , } j − i +1 to thedomain { , } n . The extended f g (cid:22) simply passes through the bits on which it does not act(i.e. bits outside of the [ i, j ] discrete interval as shown in Figure 2(b)). A railway circuitcomputes the circuit function f C : { , } n → { , } n by propagating its n input bits fromsection to section and applying at each step the section’s gate function to the appropriatesubset of bits. In other words, we have f C = ( f g k − (cid:22) ) ◦ ( f g k − (cid:22) ) ◦ · · · ◦ ( f g (cid:22) ) ◦ ( f g (cid:22) ) with g s being the gate in section s . Figure 2(b) gives an example of a class of 6-wire railway circuitsof width 7. This example is implementing the 6-bit iterated Boolean circuit model [29] shownin Figure 2(a). A gate g = ( s, i, j, f g ) of an n -wire railway circuit C is local if j − i + 1 < n ,i.e. the gate does not span all n wires. The railway circuit C is local if all of its gates arelocal. For instance, the railway circuit in Figure 2(b) is local .The following lemma defines the notion of atomic components . Intuitively, it states thatwe can decompose the circuit function of a local railway circuit into a composition of functionsthat have properties crucial to our work. (cid:73) Lemma 3 (Atomic components) . Let f C : { , } n → { , } n be the circuit function ofa local railway circuit C of width k . Then there are functions f , f . . . , f k − mapping { , } n → { , } n , called atomic components, with the following three properties: f C = f k − ◦ f k − ◦ · · · ◦ f (1) For all ≤ i < k , there exists ≤ j < n , such that, ∀ ( x , . . . , x n − ) ∈ { , } n : π j ( f i ( x , . . . , x n − )) = x j (2) ∀ l = j, π l ( f i ( x , . . . , x j − , , . . . , x n − )) = π l ( f i ( x , . . . , x j − , , . . . , x n − )) (3) where π j is the projection operator on the j th component. Proof.
Let f i = f g i (cid:22) where g i is the gate in section i ≤ n −
1. Then, by the definition of f g i (cid:22) ,we have f C = ( f g k − (cid:22) ) ◦ · · · ◦ ( f g (cid:22) ) ◦ ( f g (cid:22) ) = f k − ◦ f k − ◦ · · · ◦ f which gives Equation (1).Intuitively, Equations (2) and (3) state that each function f i ignores at least one of itsparameters x j . Since C is local, for each section i the gate g i is local, meaning there is a j such that wire j is pass-through on section i of the circuit, yielding Equations (2) and (3). (cid:74) In this paper, we are interested in iterating local railway circuits in order to count. The i th iteration of a n -wire railway circuit C is written f i C ( x ) = f C ( f C ( . . . f C ( x )) | {z } i times , with the convention f C ( x ) = x . Since our input space is of size 2 n , we know that the sequence of iterations of C on input x is periodic of period at most 2 n . We define the trace of x (relative to C ) to be thesequence x, f C ( x ) , f C ( x ) , . . . , f n − C ( x ), i.e. the first 2 n iterations of C on x . We now definewhat counters are: Note that locality does not prevent long distance influences in the circuit. If one concatenates threeinstances of the railway circuit in Figure 2(b), they obtain a new railway circuit where every input bithas an influence on every output bit: for instance, x will influence y . Limitations on counting in Boolean circuits and self-assembly (a) (b) y Figure 3
Each node represents a distinct n -bit string, each arrow represents application of acircuit function. The figure captures the intuition that there are only two kinds of 2 n -counter: (a) acycle that repeats all bit strings forever, and (b) an almost-cycle, that (if we begin at y ) hits allstrings once, and then cycles on a smaller loop. Note that y has no antecedent. (a) is a bijection,(b) is a quasi-bijection. (cid:73) Definition 4 ( k -counter) . An n -wire railway circuit is called a k -counter if it meets thefollowing two conditions: For all inputs x ∈ { , } n , the number of distinct elements in the trace of x is less orequal to k . There exists at least one x ∈ { , } n such that the number of distinct elements in thetrace of input x is exactly k . Since this paper is mostly concerned with proving negative results we use a relativelyrelaxed notion of counter that does not ab initio preclude any 2-bit string-enumerator,including counters that use the ‘standard’ ordering on binary strings, Gray code counters,etc. Nevertheless, we show a negative result about local railway circuits: (cid:73)
Theorem 1.
For all n > , there is no local n -wire railway circuit that implements a n -counter. The proof of Theorem 1 is given in Section 4. In order to prove Theorem 1 we are goingto describe requirements on the structure of the circuit function of a 2 n -counter (Lemma 8).Then, we are going to prove limitations on the ability of atomic components f , . . . , f k − tomeet those requirements (Lemma 28). Those limitations will be stable by composition, theywill transfer to the entire circuit function f C = f k − ◦ f k − ◦ · · · ◦ f which will end the proof. (cid:73) Remark 5.
In the following, when we talk about a function, in general we will set itsdomain to be { , , . . . , m − } for some arbitrary m = 0. When we consider a circuit’sfunction, the domain of the function is the set of strings { , } n which we will sometimes(for convenience) identify with the set of numbers { , , . . . , n − } , i.e. m = 2 n . (cid:73) Definition 6 (Quasi-bijection) . A quasi-bijection f : { , , . . . , m − } → { , , . . . , m − } is such that there exists exactly one y ∈ { , , , . . . , m − } reached by no antecedent: ∀ x ∈ { , , , . . . , m − } , f ( x ) = y . (cid:73) Remark 7.
By the pigeonhole argument, because there is exactly one y with no antecedentin a quasi-bijection f , there is also exactly one z which is reached by exactly two antecedents. (cid:73) Lemma 8.
The circuit function of a n -counter on { , } n is either a bijection or aquasi-bijection. Proof.
Figure 3 illustrates the only two behaviors that match the definition of a 2 n -counter(Definition 4). The case of Figure 3(a) corresponds to the circuit function being a bijection:every x ∈ { , } n has exactly one antecedent. The case of Figure 3(b) corresponds tothe circuit function being a quasi-bijection: there is only one y ∈ { , } n that has noantecedent. (cid:74) . Stérin and D. Woods 7 In order to prove limitations on the expressiveness of atomic components (Lemma 28) wewill make use of the general theory of functions and bijective functions.
We make use of, in a self-contained manner, the notion of ramification degree of a functionwhich has been developed much further in the field of Analytic Combinatorics [16, 5, 18]. (cid:73)
Definition 9 (Ramification degree) . Take any function f : { , . . . , m − } → { , . . . , m − } . For i ∈ { , . . . , m − } , define a i ( f ) to be the number of antecedents of i under f : a i ( f ) = card( { j | f ( j ) = i } ) . Define r i ( f ) , the ramification degree of input i under f , to be: r i ( f ) = max (0 , a i ( f ) − Finally, define r ( f ) = P i ∈{ ,...,m − } r i ( f ) to be the ramificationdegree of the function f . , r f (0) = 01 , r f (1) = 22 , r f (2) = 13 , r f (3) = 04 , r f (4) = 05 , r f (5) = 06 , r f (6) = 0 XX f : X → X card(Im( f )) = 4 r ( f ) = 3 Figure 4
Illustration of the ramification degree for f : X → X , X = { , , . . . , } and m = 7.Also illustrates Lemma 10: r ( f ) + card(Im( f )) = card( X ) = m = 7 We have an elegant way to describe what r ( f ) is counting: (cid:73) Lemma 10.
Let X = { , . . . , m − } and f : X → X then r ( f ) = card( X ) − card(Im( f )) = m − card(Im( f )) Proof.
We are going to show that r ( f ) + card(Im( f )) = m . Figure 4 gives a general exampleof the situation. For i ∈ X , consider the set f − ( i ) of the antecedents of i by f . Bydefinition of f − ( i ) we have P i ∈ X card( f − ( i )) = card( X ). Now, define J , the set of i suchthat f − ( i ) = ∅ . By definition of r i ( f ), we have r i ( f ) + 1 = card( f − ( i )) when i ∈ J and r i ( f ) = 0 otherwise. By definition of Im( f ), we have card(Im( f )) = card( J ). Now we have r ( f ) + card(Im( f )) = X i ∈ X r i ( f ) + card( J ) = X i ∈ J r i ( f ) + X i J r i ( f ) | {z } +card( J )= X i ∈ J (card( f − ( i )) −
1) + card( J ) = X i ∈ J card( f − ( i )) − card( J ) + card( J )= X i ∈ J card( f − ( i )) = X i ∈ X card( f − ( i )) = card( X ) = m (cid:74) We can easily describe functions with ramification degree 0 and 1:
Limitations on counting in Boolean circuits and self-assembly (cid:73)
Lemma 11.
Let f : { , . . . , m − } → { , . . . , m − } then we have the two followingequivalences: r ( f ) = 0 ⇔ f is a bijection. r ( f ) = 1 ⇔ f is a quasi-bijection. Proof.
Let X = { , . . . , m − } . If r ( f ) = 0, by Lemma 10 we have card(Im( f )) = card( X ). It means that f is surjective,but f has the same domain and range so f is bijective. If r ( f ) = 1, by Lemma 10 we have card(Im( f )) = card( X ) −
1. It means that there isexactly one x ∈ X which is not reached by f so f is a quasi-bijection (see Definition 6). (cid:74) An important property of ramification degree is that it does not decrease under composition: (cid:73)
Lemma 12.
Let f, g ∈ { , . . . , m − } → { , . . . , m − } . Then we have: r ( f ◦ g ) ≥ max( r ( f ) , r ( g )) Proof.
Let X = { , . . . , m − } . By Lemma 10, we wish to show that card(Im( f ◦ g )) ≤ card(Im( f )) and card(Im( f ◦ g )) ≤ card(Im( g )). Firstly, we have: Im( f ◦ g ) ⊂ Im( f ). Hence,card(Im( f ◦ g )) ≤ card(Im( f )). Secondly, we have Im( f ◦ g ) = { f ( x ) | x ∈ Im( g ) } . It followsthat card(Im( f ◦ g )) ≤ card(Im( g )). (cid:74) From Lemma 12, we immediately get the following: (cid:73)
Corollary 13.
Let f : { , . . . , m − } → { , . . . , m − } such that there exists f , f , . . . , f k − with f = f k − ◦ f k − ◦ · · · ◦ f . Then: r ( f ) = 0 ⇒ ∀ i, r ( f i ) = 0 r ( f ) = 1 ⇒ ∀ i, r ( f i ) = 0 or r ( f i ) = 1 (cid:73) Remark 14.
Said otherwise, you can only construct a bijection by composing bijectionsand you can only construct a quasi-bijection by composing bijections and quasi-bijections.
The following results about bijections are well-known group theoretic results which the readercan find, for instance, in [24]. Here, we define a few notions that are required to state andprove out main results (Lemma 28 and Theorem 1), with some details left to Appendix A. (cid:73)
Definition 15 (The symmetric group S m ) . The set of all bijections with domain andimage { , , . . . , m − } , is called S m , the symmetric group of order m . It is a group forfunction composition ◦ and its neutral element is the identity. (cid:73) Remark 16.
Note that the set of bijections on { , } n → { , } n corresponds to S n . (cid:73) Definition 17 (A swap) . A swap (or transposition) is a bijection τ ∈ S m which leaves allits inputs invariant except for two that it swaps: i.e. there exists i = i ∈ { , , . . . , m − } such that τ ( i ) = i , τ ( i ) = i and τ ( i ) = i for all i
6∈ { i , i } . (cid:73) Remark 18.
A swap is its own inverse: τ ◦ τ = Id. (cid:73) Lemma 19 (Decomposition into swaps) . Take any f ∈ S m . There exists p swaps τ , τ , . . . , τ p − such that: f = τ p − ◦ · · · ◦ τ . We call ( τ , τ , . . . , τ p − ) a swap-decompositionof f . . Stérin and D. Woods 9 Proof.
Another way to read f = τ p − ◦ · · · ◦ τ is τ − ◦ τ − · · · ◦ τ − p − ◦ f = Id whichmeans that the composition of transpositions τ − ◦ τ − · · · ◦ τ − p − = τ ◦ τ · · · ◦ τ p − is sorting the permutation f back to the identity. The existence and correctness of the bubble sort algorithm, which operates uniquely by performing swaps, proves that sucha sequence of swaps exists: we can take the swaps done by bubble sorting the sequence[ f (0) , f (1) , . . . , f ( m − (cid:74)(cid:73) Theorem 20 (Parity of a bijection) . Let f ∈ S m . The parity of the number of swaps usedin any swap-decomposition of f does not depend on the decomposition. If f = τ p − ◦ · · · ◦ τ and f = τ p − ◦ · · · ◦ τ then p ≡ p [2] . Hence we say that the function f is even if p is evenand odd otherwise. The proof is in Appendix A. (cid:73)
Remark 21.
From the points made in the proof of Lemma 19 and in Theorem 20 , we canalso interpret the parity of a bijection to be the parity of the number of swaps needed to sortit back to the identity. (cid:73) Example 22. By f = (1 , , , ∈ S , we mean f (0) = 1 , f (1) = 0 , f (2) = 3 , f (3) = 2.The bijection f = (1 , , ,
2) is even as we can sort it in 2 swaps by swapping 1 and 0 then 3and 2. The bijection f = (0 , , ∈ S is odd as we can sort it in 1 swap by swapping 2and 1. (cid:73) Corollary 23 (Multiplication table) . When looking at the parity of bijections, the followingmultiplication table holds: odd ◦ odd = even , odd ◦ even = odd , even ◦ odd = odd , even ◦ even = even . Proof.
We give the proof for even ◦ even = even , other cases are similar. Take f, g ∈ S m tobe two even bijections. Decompose f and g into swaps: f = τ p − ◦ · · · ◦ τ , g = τ q − ◦ · · · ◦ τ .Because f, g are even, we know that p and q are even. Note that f ◦ g = τ p − ◦ · · · ◦ τ ◦ τ q − ◦ · · · ◦ τ . Hence there exists a swap-decomposition of f ◦ g using an even number, p + q ,of swaps. By Theorem 20, we conclude that f ◦ g is even. (cid:74) In this paper, we are only concerned by a very specific kind of bijections: k -cycles. Indeed,Lemma 26 will show that the circuit function of a bijective 2 n -counter is a 2 n -cycle. Theparity of a k -cycle is easy to compute: it is equal to the parity of k − (cid:73) Definition 24 ( k -cycle) . For k ≥ , a k -cycle ρ ∈ S m is a bijection such that there existsdistinct x , x , . . . , x k − ∈ { , . . . , m − } such that ρ ( x ) = x , ρ ( x ) = x , . . . , ρ ( x k − ) = x and ∀ x
6∈ { x , . . . , x k − } , ρ ( x ) = x . (cid:73) Theorem 25 (Parity of k -cycle) . A k -cycle ρ has the parity of the number k − . It meansthat ρ is odd iff k − is odd and ρ is even iff k − is even. The proof is in Appendix A. (cid:73)
Lemma 26.
The circuit function of a bijective n -counter is a n -cycle. Proof.
The mapping produced by the circuit function of a bijective 2 n -counter is illustratedin Figure 3(a), it matches the definition of a 2 n -cycle and generalises to any n ∈ N + . (cid:74) Also known as the “Futurama theorem”: (cid:73)
Corollary 27 (Bijective n -counters have odd circuit functions) . The circuit function of a n -counter is an odd bijection. Proof.
We know that the circuit function of a 2 n -counter is a bijection (Lemma 8). We knowthat it is a 2 n -cycle (Lemma 26). Hence, a 2 n -counter has the parity of 2 n − (cid:74) n Here we use the results of Section 3, to show our main result, Theorem 1, by giving two resultson atomic components. The first is that atomic components are not odd bijections. Thisresult is known in the context of reversible circuits [26, 30, 6], we give a proof that fits ourframework of railway circuits. The second is that atomic components are not quasi-bijections. (cid:73)
Lemma 28 (Locality restricts atomic components) . Let f C = f k − ◦ f k − ◦ · · · ◦ f be thedecomposition into atomic components of the circuit function of a local n -wire railway circuit.Then we have the following: No f i can be an odd bijection No f i can be a quasi-bijection, i.e., r ( f i ) = 1 Proof.
In the following, when we refer to the truth-table of f i we mean the Boolean ( n, n )matrix where the p th column corresponds to the bits of the p th element in the 2 n -longsequence [ f i (0 , , · · · , , f i (0 , , · · · , , . . . , f i (1 , , · · · , Because f i is local either its first bit or its last bit has to have the properties outlined inLemma 3, Equations (2) and (3). Two cases: • Let suppose that the first bit of f i has the properties: it is pass-through ( y = x )and it does not affect any other output bits than y . Then, M , the truth-table of f i has a very remarkable structure, the first line is composed of 2 n − zeros followedby 2 n − ones. Furthermore, the following ( n − , n − ) sub-matrices of M , M and M are equal. The sub-matrix M is defined by excluding the first row of M andtaking the first 2 n − columns while M also excludes the first line of M but takescolumn between 2 n − and 2 n . Indeed, since x has no influence on y , . . . , y n − wehave M = M . That means that we can sort M in an even number of steps by usingtwice the sequence of swaps needed to sort M = M : we first sort the first half of M then transpose the swaps we used to the second half. Hence, since we can use an evennumber of swaps to sort f i , by Theorem 20, f i is even. • Let suppose that the last bit of f i has the properties: it is pass-through ( y n − = x n − )and it does not affect any other output bits than y n − . Again, M , the truth-table of f i has a very remarkable structure: an even column p is such that column p + 1 sharethe same first n − p is 0 while the last bit of column p + 1 is 1. Column p and column p + 1 are next to each other in lexicographic order. Itmeans that we sort the columns of M by swapping blocks of two columns at each step.Since swapping two blocks of two columns can be implemented by using 2 swaps, withthis technique, we will use a multiple of 2 swaps to sort the table. By Theorem 20, itimplies that f i is even. The truth-table of a quasi-bijection has the following properties: only two columns appeartwice with n -bit vector x ∈ { , } n and exactly one n -bit vector x ∈ { , } n appearsnowhere in the table. The Hamilton distance of x and x is at least one. Let supposethat x and x disagree in their j th bit, π j ( x ) = π j ( x ). W.l.o.g we can take π j ( x ) = 1.Now, because the vector x is the only vector to appear twice in the truth table, it means . Stérin and D. Woods 11 that on the j th line of M we see 2 n − + 1 ones versus 2 n − − f i islocal, y j does not depend on at least one input and hence, the number of zeros and oneson the j th line of M is at least a multiple of 2. (cid:74) We now have all the elements to prove our main result: (cid:73)
Theorem 1.
For all n > , there is no local n -wire railway circuit that implements a n -counter. Proof.
Consider the circuit function of a local n -wire railway circuit C which implements a2 n -counter and its decomposition into atomic components, f C = f k − ◦ f k − ◦ · · · ◦ f . Weknow that f must be either a bijection or a quasi bijection (Lemma 8), giving two cases: If f is a bijection, by Corollary 13, each atomic component must be a bijection too.Furthermore, by Corollary 27, f must be an odd bijection. But, with Lemma 28, weknow that each atomic component can only be an even bijection, and by Corollary 23,composing even bijections only leads to even bijections. Hence, f cannot be odd andthere are no bijective 2 n -counter. If f is a quasi-bijection, by Corollary 13, each atomic component must be either a bijectionor a quasi-bijection. Furthermore we need at least one atomic component to be a quasi-bijection since composing bijections only leads to bijections. However, Lemma 28 showsthat no atomic component can be a quasi-bijection. Hence, f cannot be a quasi-bijectionand there are no quasi-bijective 2 n -counter. (cid:74) Here we apply the Boolean circuit framework already established in previous sections to showlimitations of self-assembled counters that work in base 2. We give a short description of theabstract Tile Assembly Model (aTAM) [27, 23], more details can be found elsewhere [20, 11].
Let N = { , , . . . } , N + = { , , . . . } , and Z , R be the integers and reals.In the aTAM, one considers a set of square tile types T where each square side hasan associated glue type , a pair ( s, u ) where g is a (typically binary) string and u ∈ N is a glue strength. A tile ( t, z ) ∈ T × Z is a positioning of a tile type on the integerlattice. A glue is a pair ( g, z ) ∈ G × H where H is the set of half-integer points H = (cid:8) z ± h | z ∈ Z , h ∈ { (0 , . , (0 . , } (cid:9) and G is the set of all glue types of T . An assemblyis a partial function α : Z → T , whose domain is a connected set. For X ⊂ Z we let α | X denote the restriction of α to domain X , i.e. α | X : X → T and for all z ∈ X , α ( z ) = α | X ( z ).Let T = ( T, σ, τ ) be an aTAM system where T is a set of tile types, τ ∈ N + is thetemperature and σ is an assembly called the seed assembly. The process of self-assemblyproceeds as follows. A tile ( t, z ) sticks to an assembly α if z ∈ Z is adjacent in Z to,but not on, a tile position of α and the glues of t that touch glues of α of the sameglue type have the sum of their strengths being at least τ . A tile placement is a tuple( t, z, In) ∈ T × Z × { N, E, S, W } ≤ , where In denotes the k ∈ { , , , } tile sides whichstick with matching glues and are called input sides ; the remaining 4 − k sides are called A pair of glues touch if they share the same half-integer position in H . output sides . For example, a tile of type t that binds at position z using its north and westside would be denoted ( t, z, ( N, W )). After the tile placement ( t, z,
In) to assembly α , theresulting new assembly α = α ∪ { z → t } is said to contain the tile ( t, z ), and we write α → T α . An assembly sequence is a sequence of assemblies ~α = α , α . . . , α k where for all i , α i → T α i +1 , in other words: each assembly is equal to the previous assembly plus onenewly-stuck tile. A terminal assembly of T is an assembly to which no tiles stick. T is saidto be directed if it has exactly one terminal assembly and undirected otherwise. The following definitions are for representing Boolean functions as assembly systems. (cid:73)
Definition 29 (bit-encoding glues) . A bit-encoding glue type is a pair g = ( s, b ) ∈ Σ ∗ × { , , (cid:15) } , where s is a string over the finite alphabet Σ . If b = (cid:15) , g is said to encodebit b , otherwise if b = (cid:15) , we say g does not encode a bit. A bit encoding glue is a pair ( g, z ) where g is a bit-encoding glue type, and z ∈ H is a position. In a tile placement, if a bit encoding glue is on an input side of the tile placement we callthat an input bit to the tile placement, if it is on an output side it is called an output bit. (cid:73)
Definition 30 (Cleanly mapping tile placements to a railway circuit gate) . Let A be a set ofassembly sequences that use tiles with bit-encoding glues, let z ∈ Z be a position, and P z beunion of the tile placements from position z over all ~α ∈ A . P z is said to cleanly map to arailway circuit gate if (a) each ~α has a tile placement at position z ; and (b) there is a k ∈ { , , } such that all placements in P z map k input bits to k output bits;and (c) if an (cid:15) -glue g (non-0/1 encoding glue) appears at direction d ∈ { N, W, S, E } for some p ∈ P z then all p ∈ P z have glue g at direction d . (cid:73) Remark 31.
The previous definition is crafted to allow glues to encode bits in a way that canbe mapped to railway circuit gates, but also to prevent tiles from exploiting non-bit-encodingglues to “cheat” by working in a base higher than 2. (cid:73)
Definition 32 (glue curve) . A glue curve c : (0 , → R is an infinite-length simplecurve that starts as of a vertical ray from the south, then has a finite number of unit-lengthstraight-line segments that each trace along a tile side (and thus each touch a single point in H ), and ends with a vertical ray to the north. By a generalisation of the Jordan curve theorem to infinite-length simple polygonal curves,a glue curve c cuts the R plane in two [19] (Theorem B.3). We let LHS( c ) (cid:40) Z denotethe points of Z that are on the left-hand side of c , and RHS( c ) (cid:40) Z denote the pointsof Z that are on the right-hand side of c . For a vector ~v in R we define c + ~v to be thecurve with the same domain as c (the interval (0 , ∪ x ∈ (0 , c ( x ) + ~v i.e. thetranslation of the image of c by ~v .For an assembly α and glue curve c let α ↑ c = g , g , . . . denote the sequence of all glues oftiles of α that are positioned on c , written in c -order. Let B : { g | g is a sequence of bit-encoding glues }× A simple curve is a mapping from the open unit interval (0 ,
1) to R that is injective (non-self-intersecting). Intuitively, the left-hand side of a glue curve (or any an infinite simple curve) is the set of points from R that are on one’s left-hand side as one walks along the curve, excluding the curve itself. See [19] fora more formal definition appropriate to glue curves. . Stérin and D. Woods 13 { c | c is a glue curve } → { , } ∗ , where for the glue sequence g = ( s , b ) , ( s , b ) , . . . wedefine B ( g ) = b b · · · ∈ { , } ∗ to be the bit-string encoded by the glues g (here if some b = (cid:15) it is interpreted as the empty string). Hence, B ( α ↑ c ) is the sequence of bits encodedalong glue curve c by assembly α . (cid:73) Definition 33 (Layer-computing an n -bit function) . Let n ∈ N . The tile set T is said to layer-compute the n -bit function f : { , } n → { , } n if there exists a temperature τ ∈ N , aglue curve c , and a vector ~v ∈ R with positive x -component such that, for all i ∈ { , , . . . } , Im( c ) ∩ Im( c + i · v ) = ∅ , and for all x ∈ { , } n there is an assembly σ x positioned on theleft-hand side of c , such that the tile assembly system T x = ( T, σ x , τ ) is directed and (a) B ( σ x ↑ c ) = x and B ( α x ↑ ( c + ~v )) = f ( x ) where α x is the terminal assembly of T x ; and (b) T x has at least one assembly sequence ~α x that assembles all of α | LHS( c + ~v ) without placingany tile of α | RHS( c + ~v ) ; and (c) for all positions z ∈ (RHS( c ) ∩ LHS( c + ~v )) (cid:40) Z , and for all x the set P z of tileplacements at position z in ~α x (from (b)) map cleanly to a gate (Definition 30). (cid:73) Remark 34.
Definition 35 and Lemma 36 below are not needed to prove our main result, butare included to show that any system satisfying Definition 33 can be “iterated” to computelayer-by-layer, similar to the sense in which tile-based counters in the literature computelayer-by-layer. (cid:73)
Definition 35 (Computing an iterated n -bit function) . The tile set T is said to layer-compute f k , i.e., k iterations of the Boolean function f : { , } n → { , } n , if (a) T layer-computes f via Definition 33, and (b) T x ’s terminal assembly α x , for each i ∈ { , , . . . , k − } , has B ( α x ↑ ( c + i · ~v )) = f i ( x ) . (cid:73) Lemma 36.
Let T be a tile set that layer-computes the n -bit function f according toDefinition 33. Then for any k ∈ N , T also computes f k according to Definition 35. Proof.
We give a simple proof by induction on iteration f i for i ∈ { , , . . . , k − } . Theintuition is to let y = f i ( x ) ∈ { , } n , then use Definition 33 to compute f ( y ), and thentranslate the resulting assembly to a later layer to compute f i +1 ( y ) = f ( f i ( y )).For the base case, let i = 0. By Definition 33, the seed σ x encodes x ∈ { , } n along c as B ( σ x ↑ c ) = x and σ x places no tiles in RHS( c ) (cid:40) Z . Hence T computes f ( x ) = x accordingto Definition 35.For the inductive case, let i >
0. Let ~α = α , α , . . . , α m be an assembly sequence of T x such that, inductively, we assume that on the last assembly α m of ~α the cut c + i · ~v encodesthe bit sequence f i ( x ) = B ( α x ↑ ( c + ~i · v )) ∈ { , } n , and α m has no tiles in RHS( c + i · ~v ), andno more tiles can stick in LHS( c + i · ~v ). Next, consider the seed assembly σ y that encodes y = f i ( x ), and let ~α = σ y , α , α , . . . be an assembly sequence that satisfies Definition 33(b)and (c). For each k ∈ { , , . . . , | ~α | − } let ( t, z ) k be the tile that sticks (is attached) toassembly α k to give the next assembly α k +1 in ~α . We make a new assembly sequence ~α thatstarts with the assembly α m (defined above), then stick the ‘translated tile’ ( t, z + i · ~v ) , andthen sticks ( t, z + i · ~v ) , and so on. In other words define ~α = α m, → T α m, → T · · · bybeginning with α m = α m, and in turn attaching the tiles ( t, z + i · ~v ) , ( t, z + i · ~v ) , . . . in order.the assembly sequence ~α eventually contains an assembly that encodes f ( y ) = f i +1 ( x ) alongthe curve c + ( i + 1) · ~v as f i +1 ( x ) = B ( α x ↑ ( c + ( i + 1) · ~v )). This completes the induction. (cid:74) (cid:73) Lemma 37 (Railway circuits simulate layer-computing tile sets) . Let T be a tile set thatlayer-computes, via Definition 33, the Boolean function f : { , } n → { , } n for n ≥ .Then there is a local railway circuit that computes f . Proof.
By Definition 33, let τ be the temperature, c the glue curve, ~v the vector, and foreach input x ∈ { , } n let σ x be the seed assembly encoding x and let T x = ( T, σ x , τ ). Wewill construct a n -wire local railway circuit from T .For each x , let ~α x be the assembly sequence that satisfies Definition 33(b) and (c).By directedness, the choice of ~α x over other assembly sequences is inconsequential sinceall assembly sequences for x compute the same output f ( x ) for the layer. For any z ∈ (RHS( c ) ∩ LHS( c + ~v )) (cid:40) Z and for all x ∈ { , } n , let P z denote the set of tile placementsthat appear at position z in the set of assembly sequences ∪ x ( ~α x ). By Definition 33(c), P z maps cleanly to a gate, and we let g z denote that gate. Via Definition 30, there are k z ∈ { , , } inputs and k z outputs to g z (i.e. fanin and fanout are equal to k z ≤ g z ).In the railway circuit for each gate g z we define a section s z ; there are n inputs and n outputs to the section, k z of those n are fed through gate g z and the remaining n − k z arepass-through. In other words, the n -bit function computed by the section is defined by theextension f g z (cid:22) to n bits of the function f g z computed by gate g z on k z bits (see Section 2).The section is local since k z < n .It remains to wire the sections together (order them) so that they compute f . Choose any x ∈ { , } n , and let z , z , . . . , z m be the sequence of positions in the order defined by thecanonical assembly sequence ~α x as defined earlier in the proof. Let x ∈ { , } n where x = x and let ~α x be the canonical assembly sequence for x . By Definition 30, all assembly sequencesshare the same set of tile positions from Z . We will define a new assembly sequence ~β x , thathas σ x as its first assembly, fills positions in the order z , z , . . . , z m (we used for ~α x ) andproduces the same terminal assembly as ~α x . For z in z , z , . . . , z m , in the order given, let p be tile placement at position z in α x ( p exists by Definition 30), and we claim we can attach p to the current assembly β to get a new assembly β . Since, the assembly α from ~α x thatreceives the placement at position z to make α (i.e. α → T α ), has neighbouring positionsproviding sufficient tile sides (glues) for the placement at z , and since we are iterating throughplacement positions in the same order, the same is true of β . Hence p can be placed on β to give β . Since ~α x , ~α x and ~β x all share the same set of positions, and since ~α x and ~β x share the same tile placement at each shared position, the terminal assembly of ~α x and ~β x are identical. Each position z , z , . . . , z m defines a section s z , s z , . . . , s z m , and we wire thesections in the order given. Since each section is a local railway circuit from n bits to n bits,their composition/concatenation is too. By Definition of T , B ( α x ↑ ( c + ~v )) = f ( x ) ∈ { , } n ,and by construction the output of section s z m is the same value f ( x ). (cid:74)(cid:73) Theorem 38.
Let n ∈ { , , . . . } . There is no tile set T that layer-computes, via Defini-tion 33, an odd bijective n -bit function, or a quasi-bijective n -bit function, or a n counteron n -bits. Proof.
By Lemma 37 there is a railway circuit C that layer-computes the same function, f ,as T . By Theorem 28, C does not compute an odd bijection nor quasi-bijection, and hence(or by Theorem 1) C does not compute a 2 n counter. (cid:74) We illustrate our definitions by applying them to previously studied self-assembly systems. . Stérin and D. Woods 15 c+v c+ vc c+ v c+ v σ x (a) (b) (c) z z z z z z z z z x x x x x x y y y y y y ab ab x x x x x x z z z z z z y y y y y y z Figure 5
Impossibility of a 2 n counter in IBCs. The lattice is rotated by 45 ◦ , relative to thestandard Z lattice. Theorem 2, shows that although there are 64 possible bit-strings that appearacross the all cuts for all 6-bit systems, no 64-counter is possible in any one system. (a) First fewlayers of a 6-bit 63-counter for the 6-bit IBC tile model that appeared in [29]. The glue curve c , andits translations by multiples of vector ~v are shown in dashed green. (b) Layer for the same systemshowing tile positions z , z , . . . , z ∈ Z . Glues that encode 0/1 bits are shaded black, (cid:15) -glues(that do not encode a bit) are shaded grey, for use in Definition 33. (c) Local railway circuit thatsimulates the IBC via Lemma 37, the existence of that that simulation implies the impossibility of a2 n -counter. The negative result generalises to all even n and any number of tile layers (depth) ≥ (cid:73) Example 39 (IBC tile sets) . For n, ‘ ∈ N , with n even, the directed n -bit ‘ -layer IBCmodel is defined in Section SI-A-S1 of [29], and the 6-bit 1-layer IBC tile assembly model isdefined graphically in Figure 1b of the same paper. Here it is illustrated in Figure 5. TheIBC model is a restriction of the aTAM, hence we use the terminology from Section 5.1.A directed 6-bit IBC tile set T is a set of 31 tile types with 4 tiles for each of positions z , z , . . . , z (mapping two input bits to two ouput bits), two tiles for each of positions z and z (mapping one input bit to one output bit), and one seam tile for each of positions z and z (mapping no input bits to no output bits – using (cid:15) glues in Definition 29). Theset of tile types associated to a position is unique to that position, hence in an assemblytile types that appear on row i will never appear on row j = i . We let P z i denote the setof tile placements for position z i , where i ∈ { , , , . . . , } , Figure 5(a) illustrates the 4 tileplacements for position z .More generally, for any even n , and ‘ ≥
1, the n -bit, ‘ -layer IBC model is defined in [29].For the ‘ -layer case, there are 2 ‘ tiles that map 1 input bit to 1 output bit, ( n − ‘ tilesthat map 2 input bits to 2 output bits, and 2 ‘ tiles (or merely ‘ tiles if using a tube topologyas in [29]) that map 0 input bits to 0 output bits. (cid:73) Lemma 40.
For any even n ∈ { n | n ∈ N } , ‘ ∈ N + , an n -bit IBC tile set T layer-computes a Boolean function according to Definition 33. Proof.
IBCs (described in Example 39, illustrated in in Figure 5) satisfy Definition 33: Inthat definition let τ = 2, let c run along the seed σ x as shown in Figure 5, and let ~v = (0 , ‘ √ c , ~v , σ x for each x ∈ { , } n , and the fact that the tile set outputs a bit sequence (that we define to It is possible to have randomised and non-randomised/deterministic/directed IBCs [29], here we lookonly at the deterministic case, meaning that given a seed and tile set, an IBC produces exactly oneterminal assembly.
Figure 6
Impossibility and possibility of a 2 n zig-zig counter in the aTAM. (a) An aTAM tile set.Glues that encode 0/1 bits are shaded black, (cid:15) -glues (that do not encode a bit) are shaded grey.Red denotes a glue type w that can be either be a 0/1 encoding glue (assembles a 2 n − counter –non-maximal), or an (cid:15) -glue (assembles a 2 n counter – maximal). Each row has a unique set of tiletypes, indicated by tile colour. (b) Example growth starting from a seed assembly σ x that encodesthe input x = x x x = 000. (c1) A layer defined by the curve c and its translation c + ~v , both ingreen, and (c2) its simulation by a circuit. The circuit is not a railway circuit since gates z and z have fanout unequal to fanin; this can be seen by counting the number of wires that intersecteach section border (3 wires on the green borders, 4 on the blue). The layer in (c1) and the circuitin (c2) define a maximal 2 n -counter for n = 3, and the construction generalises to give a maximal2 n -counter for any n ∈ N ). Likewise, (d1) and (d2) define a 2 n counter by exploiting unequal faninand fanout on some gates: in particular, in (d1) we’ve chosen the w glue to be a 0/1-encoding glueand the resulting circuit in (d2) is not a railway circuit (the green section borders intersect 3 wires,the blue intersect 4 wires). Finally, in (e1) we define c and ~v in a way that gives a 2 n − counter(since setting x = 1 enables counting on 3 bits, and setting x = 0 does not help – forces the otherbits to merely be copied). In this case the resulting circuit in (e2) is not a valid railway circuit(neither maximality nor application of our main result). be f ( x )) along c + ~v . Definition 33(b) is satisfied by the assembly sequence that places tilesin “half-layer order” as follows: z , z , . . . , z n +1 then z , z , . . . , z n +2 , for layer 1, and so onfor all ‘ layers. Definition 33(c): for i ∈ { , , . . . , ( n + 3) ‘ − } , the sets of tile placements P z i are defined using (a fairly obvious) generalisation of the scheme illustrated in Example 39and Figure 5(b) for n = 6 and ‘ = 1. Each such placement maps cleanly to a railway circuitgate since IBC tile positions each have an associated set of 2 k tile types that each map k ∈ { , , } input bits to k output bits, in particular, fanin is equal to fanout for each gate,and < n hence for n ≥ (cid:74) Thus, via Lemma 37, n -bit IBC tile sets are simulated by n -wire local railway circuits(Figure 5(c) shows an example). Hence by Theorem 38 we immediately get: (cid:73) Theorem 2.
For all n ≥ , there is no n -bit IBC tile set that self-assembles a n counter. Figure 6 illustrates a simple “zig-zig” counter system, where each column of tiles incrementsan n -bit binary input, for n = 3. By repeating the rows of green tiles (either by using thesame title types or hardcoding rows) the system generalises to arbitrary n ∈ N .Our main self-assembly result does not apply to zig-zig systems. Figure 6(c1), (d1) and(e1) show a number of choices for 0/1-encoding glues, versus (cid:15) -glues, as well as two choices . Stérin and D. Woods 17 for the curve c , and in the three cases our attempt to construct a railway circuit fails. Thecircuit (and tile types) exploit unequal gate fanin and gate fanout, hence some positions donot map cleanly to a gate hence Definition 33 does not apply. Furthermore, it can be seenthat for any n ∈ N + a maximal 2 n counter is achieved (shown for n = 3 in Figure 6). Figure 7
Zig-zag tile assembly system, similar to Evans [15]. (a) Schematic of a zig-zag systemshowing the seed σ x and arrows indicating tile attachment order. The first column of tiles (“zig”)implements a binary increment, using tile types similar to those in Figure 6(a), the second columnof tiles (“zag”) copies a columns of input bits to the right. The choices for the curve c (in green) andvector ~v = (2 ,
0) for Definition 33 are shown. (b) A layer consists of a single zig (tiles at positions z , . . . , z ) followed by a zag (tiles at position z , . . . , z ,). Intuitively, because some glues outputconstant bits (e.g. x = y = 1 we are free to choose whether those glues should be 0/1-encodingglues (black), and (cid:15) -glues (grey), in (b) we have all glues be 0/1-encoding which leads to a validrailway circuit in (c) that simulates the tile layer in (b). Specifically, in (c) all gates having fanin andfanout that is equal; in other words the functions from one green/blue cut to the next green/bluecut are all from n bits to n bits. Moreover, no gate spans all 6 wires hence the railway circuit islocal. Hence our main theorem applies that this system does not implement a 2 n counter on n = 6bits (it does however, implement a 2 n − -counter on n = 6 bits). (d) If we instead assume that x , y are (cid:15) -glues, we get a maximal 2 n counter (but on only n = 5 bits). In (e) the resulting circuit is nota railway circuit since some gates z , z , z , z have unequal fanin and fanout. Unequal fanin andfanout means that the function from blue/green cut to blue/green cut are not all on a fixed number n bits, hence our techniques do not apply. Figure 7(a) illustrates an aTAM schematic of a “zig-zag” counter system that wasimplemented experimentally in [15]. The system has alternating increment (“zig”) and copy(“zag”) columns. The increment columns use similar tiles to those shown in Figure 6(a).If we fix n (e.g. for Figure 6, let n = 6), and vary our interpretation of the glues as either (cid:15) -glues, the counter can be seen to implement a non-maximal 2 n − counteron n bits, or a maximal 2 n counter on n − x and y ) as encoding a bit, and in this case the system meets Definition 33, and viathe proof of Lemma 37 we get the railway circuit shown in Figure 7(c). Hence, with thatglue interpretation a 2 n counter is impossible (Theorem 38). Further intuition be obtaineddue from the tile set design: in Figure 6(a) the bit x = y and is always 1, and an analysisof the tile set shows that we get a 2 n − -counter.If we instead, use the interpretation in Figure 7(d) interprets several of the glue positions(e.g. x and y ) as not encoding a bit, and instead being (cid:15) -glues. In this case our attemptto apply Definition 33 fails as some tile positions map to Boolean gates with fanin unequalto fanout; see for example gates z , z , z , z in Figure 7(e). Hence our techniques do notapply. An analysis of the tile set shows that we get a maximal counter (but on one fewer bitthat the sub-maximal counter above). This example shows that a system that sticks to ourformalism, except for the fanin/fanout criteria, may exhibit sufficient expressive capabilitiesto achieve a maximal counter. References Leonard Adleman, Qi Cheng, Ashish Goel, and Ming-Deh Huang. Running time and programsize for self-assembled squares. In
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For the sake of completeness we prove Theorems 20 and 25 from Section 3: (cid:73)
Theorem 20 (Parity of a bijection) . Let f ∈ S m . The parity of the number of swaps usedin any swap-decomposition of f does not depend on the decomposition. If f = τ p − ◦ · · · ◦ τ and f = τ p − ◦ · · · ◦ τ then p ≡ p [2] . Hence we say that the function f is even if p is evenand odd otherwise. (cid:73) Theorem 25 (Parity of k -cycle) . A k -cycle ρ has the parity of the number k − . It meansthat ρ is odd iff k − is odd and ρ is even iff k − is even. These are known group theoretical results and the literature offers a lot of differentproofs for them [24]. The following lemma is crucial: (cid:73) Lemma 41 (Sign of a bijection) . Let f ∈ S m . Define (cid:15) : S m → {− , } , the sign of f , tobe: (cid:15) ( f ) = Q ≤ j
Because f is a bijection, the sets {{ j, i } | ≤ j < i < m } and {{ f ( j ) , f ( i ) } | ≤ j < i < m } are the same. However, the sets of ordered pairs { ( j, i ) | ≤ j < i < m } , { ( f ( j ) , f ( i )) | ≤ j < i < m } might differ when f ( j ) > f ( i ), i.e when f reverses the orderof ( j, i ). Hence (cid:15) ( f ) = 1 if f reverses the order an even number of times and (cid:15) ( f ) = − f reverses the order an odd number of times. We have (cid:15) ( f ◦ g ) = Q ≤ j
1. Wejuste need to focus on un-ordered pairs that features i or i since τ leaves all otherelements unchanged. Now, three cases: a. Let’s consider i such that i < i < i . We have i − i i − i = 1. We also have i − i i − i = 1. See this thread: https://math.stackexchange.com/questions/46403/alternative-proof-that-the-parity-of-permutation-is-well-defined b. Let’s consider i such that i < i < i . We have i − i i − i = − i − i i − i = − c. Let’s consider i such that i < i < i . We have i − i i − i = 1. We also have i − i i − i = 1.In all those cases, the sign is not affected: either it is compensated either it is positive.The only part of (cid:15) ( f ) with a negative sign which is not compensated is i − i i − i = −
1. Hence (cid:15) ( τ ) = −
1. We gave the proof for i < i , the argument is symmetric and can be adaptedto the case i < i . (cid:74)(cid:73) Remark 42.
Without saying it we proved that (cid:15) : S m → {− , } is a group morphism between groups ( S m , ◦ ) and ( {− , } , × ). In fact, it is the only non-trivial one (i.e. not theidentity), see [24].Theorem 20 becomes a piece of cake: (cid:73) Theorem 20 (Parity of a bijection) . Let f ∈ S m . The parity of the number of swaps usedin any swap-decomposition of f does not depend on the decomposition. If f = τ p − ◦ · · · ◦ τ and f = τ p − ◦ · · · ◦ τ then p ≡ p [2] . Hence we say that the function f is even if p is evenand odd otherwise. Proof.
Let f ∈ S m and f = τ p − ◦ · · · ◦ τ and f = τ p − ◦ · · · ◦ τ . By Lemma 41 we have: (cid:15) ( f ) = (cid:15) ( τ p − ◦ · · · ◦ τ ) = (cid:15) ( τ p − ) × · · · × (cid:15) ( τ ) = ( − p (cid:15) ( f ) = (cid:15) ( τ p − ◦ · · · ◦ τ ) = (cid:15) ( τ p − ) × · · · × (cid:15) ( τ ) = ( − p Hence we must have p ≡ p [2]. (cid:74)(cid:73) Remark 43.
The bijection f is even if (cid:15) ( f ) = 1 and odd if (cid:15) ( f ) = − k -cycle: (cid:73) Definition 24 ( k -cycle) . For k ≥ , a k -cycle ρ ∈ S m is a bijection such that there existsdistinct x , x , . . . , x k − ∈ { , . . . , m − } such that ρ ( x ) = x , ρ ( x ) = x , . . . , ρ ( x k − ) = x and ∀ x
6∈ { x , . . . , x k − } , ρ ( x ) = x . (cid:73) Theorem 25 (Parity of k -cycle) . A k -cycle ρ has the parity of the number k − . It meansthat ρ is odd iff k − is odd and ρ is even iff k − is even. Proof.
Let ρ be a k -cycle acting on x , x , . . . , x k − . One can decompose ρ is k − ρ = τ x ,x ◦ τ x ,x ◦ · · · ◦ τ x k − ,x k − . Where τ x i ,x j swaps i and j . Hence (cid:15) ( ρ ) = ( − k − and ρ is even iff k −1 is even.