Thermocompression Bonding Technology for Multilayer Superconducting Quantum Circuits
C.R. H. McRae, J. H. Béjanin, Z. Pagel, A. O. Abdallah, T. G. McConkey, C. T. Earnest, J. R. Rinehart, M. Mariantoni
TThermocompression Bonding Technology for Multilayer SuperconductingQuantum Circuits
C.R. H. McRae,
1, 2
J. H. B´ejanin,
1, 2
Z. Pagel, a) A. O. Abdallah,
1, 2
T. G. McConkey,
1, 3
C. T. Earnest,
1, 2
J.R. Rinehart,
1, 2 and M. Mariantoni
1, 2, b) Institute for Quantum Computing, University of Waterloo, 200 University Avenue West, Waterloo,Ontario N2L 3G1, Canada Department of Physics and Astronomy, University of Waterloo, 200 University Avenue West, Waterloo,Ontario N2L 3G1, Canada Department of Electrical and Computer Engineering, University of Waterloo, 200 University Avenue West,Waterloo, Ontario N2L 3G1, Canada (Dated: 9 May 2017)
Extensible quantum computing architectures require a large array of quantum devices operating with lowerror rates. A quantum processor based on superconducting quantum bits can be scaled up by stacking mi-crochips that each perform different computational functions. In this article, we experimentally demonstratea thermocompression bonding technology that utilizes indium films as a welding agent to attach pairs oflithographically-patterned chips. We perform chip-to-chip indium bonding in vacuum at 190 ◦ C with indiumfilm thicknesses of 150 nm. We characterize the dc and microwave performance of bonded devices at roomand cryogenic temperatures. At 10 mK, we find a dc bond resistance of 515 nΩ mm − . Additionally, we showminimal microwave reflections and good transmission up to 6 . is experiencing ma-jor growth thanks to the development of architectureswith ten or more quantum bits (qubits). The biggestchallenge in the realization of a universal quantum com-puter is the implementation of extensible architectureswhere qubit operations can be performed with low errorrates. Among many promising qubit architectures, those based on superconducting quantum circuits arerapidly reaching a level of maturity sufficient to demon-strate supremacy of a digital quantum computer overthe state-of-the-art classical supercomputer. Elementsof quantum-error correcting codes have already beendemonstrated in a variety of experiments using supercon-ducting qubits and a quantum memory has beenrealized with quantum states of microwave fields. In order to build an extensible quantum computer,however, many technological advances must first bedemonstrated. Among these, three-dimensional integra-tion and packaging of superconducting quantum circuitsis emerging as a critical area of study for the realization oflarger and denser qubit architectures. This approach al-lows the departure from the two-dimensional confinementof a single microchip to a richer configuration where mul-tiple chips are overlaid. Three-dimensional integration,thus, provides a flexible platform for more advanced clas-sical manipulation of qubits and qubit protection from a) Present address: Tufts University, Department of Physics andAstronomy, 574 Boston Avenue, Medford, Massachusetts 02155,USA b) Corresponding author: [email protected] the environment. In this framework, an architecturebased on multilayer microwave integrated quantum cir-cuits has been proposed and some of its basic elementsrealized, showing that high-quality micromachined cav-ities can be used to implement three-dimensional su-perconducting qubits. Leveraging the extensive body ofwork developed in the context of classical integrated cir-cuits, flip chip technology has been adopted to bond pairsof microchips containing superconducting circuits.
Microfabricated air bridges have been utilized to reduceon-chip electromagnetic interference. High-frequencythrough-silicon vias and a quantum socket based onthree-dimensional wires have been developed to attaindense connectivity on a two-dimensional array of qubits.In this article, we demonstrate the experimental im-plementation of a two-layer integrated superconductingcircuit where two microchips are attached by means ofthermocompression bonding in vacuum. The structureson the surface of the bottom chip (or base chip ) and onthe underside of the top chip (or cap ) are fabricated usingstandard photolithography techniques. Instead of a dis-crete set of indium bump bonds, a continuous thin filmof molten indium serves as bonding medium between thechips. We perform a detailed electrical characterizationof a variety of bonded devices from room temperatureto 10 mK at both dc and microwave frequencies, show-ing that the bonding technology can be used in quantumcomputing applications.Figure 1 (a) illustrates the geometric characteristics ofa capped device. The base chip consists of an intrinsicsilicon substrate of thickness 500 µ m coated by an alu- a r X i v : . [ phy s i c s . a pp - ph ] M a y (a)(b)(c) (d)T WSH FIG. 1. Capped device formed using thermocompressionbonding. (a) Cutaway of a capped device, exposing aluminum[green (dark gray)] and indium [sky blue (light gray)] films.The CPW transmission line features a center conductor ofwidth S = 12 µ m and gaps of width W = 6 µ m. The tun-nel height is H = 20 µ m, with width T = 175 µ m. Throughholes in the cap allow electrical connection to the base chip bymeans of three-dimensional wires. (b) Macrophotograph of acapped device. Inset: Microimage of a through hole showinga conductor trace aligned with a tunnel. (c) Cross-section ofa capped device showing six tunnels (dark gray rectangles).(d) Detail of a tunnel in (c). minum film with 150 nm thickness followed by an indiumfilm of equal thickness. These films are sputtered in situ in an ATC-Orion 5 sputter system from AJA Interna-tional, Inc. The coplanar waveguide (CPW) transmis-sion line visible in Fig. 1 (a) and other on-chip structuresare defined by optical lithography followed by a wet-etchin Transene A aluminum etchant. The cap consists of a 350 µ m thick silicon wafer withtunnels trenched by isotropic reactive-ion etching (RIE)and through holes formed using a deep RIE process. Af-ter etching, the cap underside is metallized with the samealuminum-indium process as the base chip.The bonding procedure is realized in a custom-madevacuum chamber with the aid of an aligning and com-pressing fixture (see details in the supplementary mate- rial). The base chip and cap are aligned with a horizon-tal accuracy of less than 10 µ m, significantly smaller thanthe device’s maximum allowed tolerances. The chips aresubsequently compressed by applying vertical pressurewith the fixture lid. At a system pressure of approxi-mately 10 − mbar, the chamber is placed for 100 min ona hot plate at 190 ◦ C, above the indium melting temper-ature ( ∼ ◦ C). Heating in vacuum prevents the for-mation of thick indium oxide and results in a strongmechanical bond without chemical or physical cleaningof the indium films prior to bonding. In fact, we foundthat bonded samples can withstand several minutes ofhigh-power sonication and multiple cooling cycles to 77 Kand 10 mK. Images of a bonded device are shown inFigs. 1 (b), 1(c), and 1(d).The dc electrical behavior of a bonded device is charac-terized using the base chip and cap layouts shown in theinset of Fig. 2. By applying a dc current through ports 1and 4 and measuring the voltage across ports 2 and 3,we find a room temperature dc resistance R (cid:39) .
785 Ω.This resistance is due to the room temperature resistanceof the aluminum-indium films on both the base chip andcap as well as the bond resistance between the two chips.We realize detailed numerical simulations of the deviceunder test (DUT) by means of ANSYS Q3D Extractor and find a theoretical R (cid:39) .
323 Ω. The discrepancy be-tween the measured and simulated resistance is likely dueto the bond resistance (not included in the Q3D model),bond inhomogeneity, or both; possible contributors tothese effects are the presence of native indium oxide be-fore bonding, inter-diffusion of aluminum and indium, ora tilt between base chip and cap.Bond inhomogeneity can be understood by modelingthe five metallic layers of a bonded device – aluminum,indium, bond region, indium, and aluminum – as a largeset of flux tubes directed from the base chip to the cap.At room temperature, each tube has a resistance R tube ;the total resistance R is approximately the parallel re-sistance of all flux tubes. Flux tubes in an unbondedregion are open circuits with resistance R tube ∼ ∞ andcause R to increase. Following this model, the ratio be-tween measured and simulated resistance indicates thatapproximately 50 % of the DUT is bonded. This result isverified by breaking apart bonded devices and inspectingoptically the surfaces of the bond region (see supplemen-tary material).Figure 2 (a) shows a four-point measurement of R as afunction of temperature T for the bonded device shownin the inset. Below the superconducting transition tem-perature of aluminum, T (cid:39) . R is approximatelythe bond resistance. The data points in the figure areobtained by measuring the device’s current-voltage (I-V)characteristic curves at various temperatures and fittingtheir slope. Figure 2 (b) shows the I-V curve measuredat T (cid:39)
10 mK. We find a critical current intensity forthe aluminum-indium films, I c (cid:39) I c is reported in the inset ofFig. 2 (b). From the least-squares best fit, we obtain a T (K) R ( Ω ) − −
10 0 10 20 − − I (mA) V ( m V ) − − − − − − − I (mA) V ( µ V ) FIG. 2. Bond characterization at dc. (a) Resistance R as a function of temperature T for the capped device depicted in theinset. Inset: Base chip with two aluminum-indium islands separated by a dielectric gap. The fully metallized cap includes atunnel which, when the chips are bonded, spans the gap on the base chip. (b) I-V characteristic curve at T (cid:39)
10 mK for thecapped device in (a). Inset: Data and fit [magenta (middle gray)] below I c . bond resistance R (cid:39) ∓ µ Ω, which is less than approx-imately 515 nΩ mm − assuming a 50 % bond area. Thisresistance is likely due to the native indium oxide filminitially present on the chips, preventing the bond regionfrom becoming superconductive at low temperatures.Figure 3 displays the microwave characterization ofthree capped and uncapped devices with layouts shownin the insets. The measurements are realized by meansof a vector network analyzer (VNA) from Keysight Tech-nologies Inc., model PNA-X N5242A; details on the mea-surement setups can be found in B´ejanin et al. The measurements in Fig. 3 (a) demonstrate that thebonding process and the addition of the cap – includingthe tunnel mouth – do not noticeably increase reflections,which are instead dominated by the three-dimensionalwires. Figure 3 (b) shows a measurement of the isolation co-efficient between two adjacent transmission lines (see in-set). At microwave frequencies a signal injected at port 1or 2 can leak to ports 3 and 4, generating signal crosstalk.Due to the three-dimensional wires, signal crosstalk forthe uncapped device is already very low. The cap furtherreduces crosstalk by more than 10 dB across the entiremeasurement bandwidth. These results may have impor-tant implications to quantum computing, where crosstalkhas been identified as a major source of error. Reflection and isolation measurements are performedat room temperature in order to maintain the DUT refer-ence planes as close as possible to the VNA ports. How-ever, the line shown in the inset of Fig. 3 (c) is charac-terized by a room-temperature loss sufficiently large to mask any abnormalities in transmission measurementsat microwave frequencies. We therefore measure this lineat ∼
10 mK, where both the indium and aluminum filmsare in the superconducting state.Figure 3 (c) shows clean transmission for both un-capped and capped devices up to f (cid:39) . et al. As a proof of concept for quantum computing applica-tions, we fabricate and measure a set of capped supercon-ducting CPW resonators. The device layout is sketchedin the inset of Fig. 3 (b), which shows nine λ/ − The resonators are characterized by measuring theirinternal quality factor at ∼
10 mK and for a mean photonoccupation number (cid:104) n ph (cid:105) (cid:39)
1, similar to the excitationpower used in quantum computing operations. The mainresonator parameters are reported in Table I. The mea-sured data and fits for the second pair of resonators inTable I are shown in Fig. S4 of the supplementary mate-rial. Note that the resonance frequency of an uncappedresonator shifts with the addition of the cap.In the supplementary material, we determine that theinternal quality factor of a capped resonator is approx- − − − − −
40 1 23 4(b) f (GHz) | S | ( d B ) − − − −
10 21(a) | S | ( d B ) − − − −
60 1 2(c) f (GHz) | S | ( d B ) UncappedCapped
FIG. 3. Characterization at microwave frequencies of the uncapped and capped CPW transmission lines shown in insets; blacklines refer to structures on the base chip and light green (light gray) shades indicate metallized tunnels and through holes inthe cap. Data for uncapped devices is plotted in light green (light gray) and for capped devices in dark blue (dark gray). (a)Magnitude of the room temperature reflection coefficient at port 1, | S | , as a function of frequency f . (b) Magnitude of theroom temperature isolation coefficient between ports 1 and 4, | S | , vs. f . (c) Magnitude of the transmission coefficient | S | measured at 10 mK. imately 1 % larger than that of an uncapped resonatordue to the vacuum participation. However, this effect issignificantly smaller than the quality factor fluctuationsover time and, thus, it cannot be resolved in our mea-surements. In fact, accounting for time fluctuations, thequality factors for capped and uncapped resonators inTable I are approximately equal.In conclusion, we have developed and characterized ahot thermocompression bonding technology in vacuumusing indium thin films as bonding agent. Our resultsshow that this technology can be readily used to im-plement an integrated multilayer architecture, combiningthe fabrication advantages of two-dimensional supercon-ducting qubits and the long coherence of micromachinedthree-dimensional cavities. This bonding technology iscompatible with the quantum socket design, paving theway toward the implementation of extensible quantum
TABLE I. Resonance frequencies and internal quality factors f uc0 , f c0 and Q uci , Q ci , respectively, for a set of four uncappedand capped resonators. f uc0 (GHz) Q uci f c0 (GHz) Q ci .
252 37700 4 .
033 202304 .
448 52100 4 .
982 225104 .
722 41830 · · · · · · .
913 44840 · · · · · · computing architectures as proposed by B´ejanin et al. In future implementations, we will improve the bond-ing procedure by including a cleaning step with an acidbuff to remove native indium oxide prior to bonding.Additionally, we will use slightly thicker indium films( ∼ µ m), a lower bonding pressure ( ∼ − mbar), invacuo chip alignment and compression, as well as a higherand more homogeneous compression by means of an hy-draulic press. Finally, we will add an inter-diffusion bar-rier between the aluminum and indium films.See supplementary materials for details on the thermo-compression bonding setup, bond inhomogeneity, trans-mission simulations, resonator data and fits, and vacuumparticipation.We acknowledge the Natural Sciences and Engineer-ing Research Council of Canada and the Canadian Mi-croelectronics Corporation Microsystems. We thank theQuantum NanoFab Facility at the University of Waterlooas well as the Toronto Nanofabrication Centre for theirsupport with device fabrication, as well as F. Deppe andJ.Y. Mutus for fruitful discussions. T. D. Ladd, F. Jelezko, R. Laflamme, Y. Nakamura, C. Monroe,and J. L. O’Brien, “Quantum computers,” Nature , 45–53(2010). T. Monz, P. Schindler, J. T. Barreiro, M. Chwalla, D. Nigg, W. A.Coish, M. Harlander, W. H¨ansel, M. Hennrich, and R. Blatt, “14-qubit entanglement: Creation and coherence,” Physical ReviewLetters , 130506 (2011). J. Kelly, R. Barends, A. G. Fowler, A. Megrant, E. Jeffrey, T. C.
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Supplementary Materials for“Thermocompression BondingTechnology for MultilayerSuperconducting Quantum Circuits”
In this supplementary materials, we provide further de-tails on the thermocompression bonding setup. We char-acterize bond inhomogeneity with optical imaging. Wepresent numerical simulations of the transmission coeffi-cient at microwave frequencies for various configurationsof capped and uncapped coplanar waveguide (CPW)transmission lines. We show the measured data and fitsfor a capped and uncapped superconducting resonatorat 10 mK. Finally, we calculate the ratio of the internalquality factor for a capped and uncapped resonator, thusestimating the effect of vacuum participation.
S1: THERMOCOMPRESSION BONDING SETUP ANDPROCEDURE
Figure S1 shows a computer-aided design of thecustom-made vacuum chamber and aligning-compressingfixture used for the thermocompression bonding. Thebottom of the chamber is made from a 10 mm thick cop-per plate, ensuring a high thermal conductivity and heatcapacity. The bottom surface of the plate is mirror pol-ished each time before placing the chamber on the hotplate. The top surface features a set of threaded screwholes, where aligning-compressing fixtures with differ-ent dimensions can be fixed; the chamber is designedto process up to 3-in. wafers. The chamber’s wall isa 30 cm high, 3 mm thick hollow cylinder made fromstainless steel, the low thermal conductivity of which en-sures little or no heating of the top part of the cham-ber. The top edge of the cylindrical wall is welded toa 6-in. ConFlat (CF) flange made from 304L stainlesssteel. ? The CF flange features a knife-edge seal mech-anism; the sealing element is a fully annealed coppergasket. The gasket is made from 1 / − mbar at operating temper-atures up to 450 ◦ C. A ultra-high vacuum, temperature-resistant valve is used to connect the CF flange to apump. A CF flanged Kodial glass viewport (sealed witha silver plated copper gasket) permits the observation ofthe chamber’s interior during processing.The aligning-compressing fixture is a square washerwith inner dimensions 16 . × . ×
15 mm. Note that the base chip is indirect contact with the copper plate, guaranteeing goodthermalization. The aligning procedure comprises threesteps: First, the base chip is placed inside the washerat the bottom of the chamber and pushed against the washer’s corner opposite to the adjustable corner; sec-ond, the cap is manually dropped on the base chip, pre-aligning the chips as accurately as possible; third, thetwo chips are aligned with the adjustable corner, whichis finally fixed to the chamber with a screw. The manualpre-alignment in step two is sufficient to prevent damageof the on-chip structures due to relative dragging of thechips during step three. The lid shown in Fig. S1 (b) isused to apply pressure on the aligned chips by means offour screws. We find that little pressure is required toobtain a mechanically strong bond.After closing the chamber, we evacuate it with a molec-ular pump from Pfeiffer Vacuum GmbH for 30 min toreach a system pressure of 1 . × − mbar. While pump-ing we monitor the chamber leak rate, which is typicallyon the order of 10 − mbar L s − . Once the chamber isplaced on the hot plate, the temperature initially fluctu-ates reaching a steady state in approximately 10 min; atthat time we start counting 100 min. Pumping is contin-ued during the entire heating process, as well as duringa cooling period when the chamber is placed to rest on athick aluminum plate.Our bonding procedure is simple and highly repro-ducible, with a yield of 80 % for a total of 15 bondedsamples.When performing thermocompression bonding of de-vices with superconducting qubits, the Josephson tunneljunctions that make the qubits will be heated at hightemperature. In order to verify whether this processdamages the Josephson junctions, we fabricate a set ofaluminum-aluminum oxide-aluminum junctions using e-beam lithography and evaporation. The junctions’ areais 350 nm ×
350 nm and their room temperature resis-tance ∼ ◦ C for 5 min at atmospheric pressure,finding that most of the junctions survive the process.In addition, we find that the post-heat room tempera-ture resistance decreases to approximately 4 kΩ. A com-plete study of heating effects on submicron sized Joseph-son junctions was performed by Koppinen et al. S2 Byheating the junctions up to 500 ◦ C in high vacuum (lessthan 10 − mbar), the authors found a stabilization of thejunctions’ tunneling resistance as well as a reduction ofthe junctions’ rate of aging. These results are very en-couraging, indicating that the hot bonding process mayeven improve the quality of the Josephson junctions. S2: BOND INHOMOGENEITY
Bond inhomogeneity can be characterized by breakingapart a bonded device and imaging the base chip and capbond surfaces optically, as shown in Fig. S2. The imagesrefer to the device outlined in the inset of Fig. 3 (c) in themain text and are taken by means of a handheld digitalmicroscope.The indium film within the boundary of the throughholes on the base chip [see Fig. S2 (a)] is heated during (a) (b)
FIG. 4. Thermocompression bonding setup. (a) Vacuum chamber. (b) Aligning-compressing fixture comprising a squarewasher, an adjustable edge corner, and a lid. The channels used to evacuate the interior of the washer when tightened to thechamber’s bottom are visible. the bonding process, but not bonded to the cap. We canthus use the color of the indium film in this region asa reference to discern bonded from not bonded regions.We determine that the region near the center of the basechip and cap was bonded well, whereas the area aroundthe edges of the two chips was not bonded. In this case,approximately 50 % of the chips’ area was bonded well.We find similar results in other devices. This effect islikely due to the compressing fixture lid that was designedto be smaller than the chips’ area, thus applying pressureonly to the center of the chips. In the conclusions of themain text we propose a remedy to this issue.
S3: TUNNEL MOUTH MICROWAVE SIMULATIONS
The edge of a through hole where the cap tunnel begins(the tunnel mouth ) represents a boundary condition forthe electromagnetic field associated with a capped trans-mission line. The line shown in the inset of Fig. 3 (c) inthe main text is characterized by two of such boundaryconditions. In order to determine whether these condi-tions generate unwanted resonance modes, we simulatethe transmission coefficient S for this line and com-pare it to that of an uncapped line and of a capped linewithout tunnel mouths (i.e., covered by an infinitely longtunnel). The numerical simulations are performed withANSYS HFSS, ? assuming perfect conductors and loss-less CPW transmission lines with equal geometric char- acteristics.The graphs displayed in Fig. S3 reveal almost perfecttransmission for the three simulated configurations, withless than 0 . S4: CAPPED SUPERCONDUCTING CPW RESONATORS
Figure S4 shows data and fits for the second pair of un-capped and capped superconducting resonators reportedin Table 1 of the main text. The displayed data for thecapped resonator is the ensemble average of 2 measuredtraces, whereas only one trace is measured for the un-capped resonator. In both cases, each data point is ob-tained setting the vector network analyzer (VNA) to anintermediate frequency bandwidth ∆ f IF = 1 Hz. S5: VACUUM CONTRIBUTION TO CAPPEDRESONATORS QUALITY FACTOR
In this section, we estimate the effect of a metallizedcap on the internal quality factor Q i of a superconduct-ing CPW transmission line resonator. The addition of agrounded cap above a CPW resonator forces some of theelectric field lines to be distributed from the base chip (a) (b) FIG. 5. Optical characterization of bond inhomogeneity. (a) Image of the base chip after bonding. The marks left by thethree-dimensional wires on trace 1 and 2 are clearly visible. (b) Image of the cap after bonding. to the cap, away from the base chip substrate. This in-creases the contribution of vacuum to the mode volume ofa capped resonator compared to the case of an uncappedresonator. Assuming all metallic structures to be perfectconductors, the internal quality factor is solely due to di- − − − − − f (GHz) | S | ( d B ) UncappedCapped without tunnel mouthCapped with tunnel mouth
FIG. 6. Magnitude of the simulated transmission coeffi-cient | S | as function of frequency f for an uncapped, cappedwithout tunnel mouth, and capped with tunnel mouth CPWtransmission line. The chosen frequency range is the same asin Fig. 3 (c) of the main text. electric losses and, thus, it can be found by inverting theloss tangent as, S5 Q i = ε (cid:48) e ε (cid:48)(cid:48) e , (1)where ε e = ε (cid:48) e − jε (cid:48)(cid:48) e is the effective electric complex per-mittivity of the CPW transmission line with real andimaginary parts ε (cid:48) e and ε (cid:48)(cid:48) e , respectively ( j = − S5 ε ce = 1 + q ( ε r1 − , (2)where q is the partial filling factor dependent on thedevice geometry [see Eq. (2.40) in Simons S5 ] and ε r1 = ε (cid:48) r1 − jε (cid:48)(cid:48) r1 is the relative electric complex permittivity ofthe base chip substrate (in our case silicon) with thick-ness h . Hereafter, we assume h → ∞ (a reasonableapproximation as the silicon substrates are 500 µ m thick,much thicker than any of the other structures; see maintext for all relevant dimensions). Note that Eq. (2) is ap-plicable as the tunnel sidewalls are much farther awayfrom the conductor than the in-plane ground planes, T (cid:29) H (see Fig. 1 in the main text).Inserting Eq. (2) into Eq. (1), we obtain the cappedinternal quality factor Q ci = 1 + q ( ε (cid:48) r1 − q ε (cid:48)(cid:48) r1 . (3)In the case of an uncapped CPW transmission line, theeffective electric permittivity is given by S5 ε uce = 1 + ε r1 − − − | S | ( d B ) −
500 0 500 − − f − f (kHz) ∠ S ( r a d ) − − − − − − − | S | ( d B ) −
500 0 500 − f − f (kHz) ∠ S ( r a d ) FIG. 7. Uncapped (left panels) and capped (right panels) resonator measurements (dots) at low power [i.e., (cid:104) n ph (cid:105) (cid:39) | S | (above) and phase angle ∠ S (below) are fitted as in B´ejanin et al. S4 (lightgray). and the internal quality factor is given by Q uci = 1 + ε (cid:48) r1 ε (cid:48)(cid:48) r1 . (5)The ratio between the uncapped and capped internalquality factors is thus Q uci Q ci = (1 + ε (cid:48) r1 ) q ( ε (cid:48) r1 − q + 1 . (6)Using the dimensions S , W , and h = H reported inthe main text and assuming ε (cid:48) r1 = 11 for silicon, wefind q (cid:39) . Q uci /Q ci (cid:39) .