Archive | 2019

Reduction of Hardware Complexity of Digital Circuits by Threshold Logic Gates Using RTDs

 
 
 

Abstract


Logic gates play an important role in digital circuit design. Hardware complexity is a major issue when designing digital circuits. Whenever any digital circuit is designed using the conventional logic gate, it faces many challenges like more number of components. So, it is today’s need to develop some new logic design concepts which reduce circuit’s hardware complexity. This paper presents threshold logic gates (TLGs) using resonant tunneling diodes (RTD) for reduction of hardware complexity. The proposed TLG is designed using RTD/FET with the help of MOnostable BIstable Latch Enable (MOBILE) principle. When TLGs are implemented using Resonant Tunneling Diodes, it demonstrates many electronic features like high-speed switching capability and functional versatility to implement functions such as AND, MAJORITY, OR, BUFFER, \\( X_{1} \\,*\\,\\bar{X}_{2} \\). However, RTDs are most suitable for implementing threshold logic rather than Boolean logic using CMOS technology. RTDs model and simulation result are verified using SPICE, which is in close agreement with the theoretical conclusion. Further, we have compared the transistor count of proposed circuits and conventional circuits for all functions. We have also calculated delay and average power of all function.

Volume None
Pages 697-710
DOI 10.1007/978-981-13-1742-2_69
Language English
Journal None

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