Analytical Model of Triple Metal Stack Engineered Pocket Dielectric Gate All Around (TMSEPDGAA) MOSFET for Improved Analog Applications

Abstract

In this brief, we have explored the impact of Triple Metal Stack Engineered Pocket Dielectric Gate All Around (TMSEPDGAA) MOSFET for Improved Analog Applications. It is so found that the TMSEPDGAA MOSFET shows improved analog performance in terms of high Ids, gm, gains, cut off frequency and lower CGG and Drain Induced Barrier Lowering (DIBL) over the conventional GAA MOSFET’s. We have also formulated a subthreshold analytical model for TMSEPDGAA MOSFET by solving the 2D Poisson’s equation by application of the accurate boundary conditions. The analytical has been analysed for different channel lengths (L = 30 nm, 45 nm and 60 nm) for surface potential, electric field (Ez), sub-threshold current (Isub) and Subthreshold Slope.