Design and analysis of radiation-tolerant high frequency voltage controlled oscillator for PLL applications

Abstract

Abstract Single Event Transients (SET’s) occur in analog integrated circuits due to the strike of a heavy-ion (or) heavy energy proton at the transistor junction. It produces electron–hole pairs, which propagates in the circuit and results in amplitude variation, phase displacement at the output voltage. This paper presents a Radiation Hardened By Design (RHBD) current starved inverter buffer Voltage Control Oscillator (VCO) for the application of Phase Locked Loop (PLL). The proposed VCO is composed of current starved inverter delay VCO and majority voter. The current starved inverter delay VCO is designed with the inverter delay cell, and a single current source is shared for each delay cell. The majority voter is designed by Gate Diffusion Input (GDI) logic to reduce power consumption. The Linear Energy Transfer (LET) ranging from 14.47 to 100 Mev − cm 2 ∕ mg is applied at the nodes of VCO. The proposed mitigation technique reduces the SET effect by 98%, and it operates at the frequency range from 0.5\xa0GHz to 2.5\xa0GHz with the power consumption of 290 μ W.