Extensive fault emulation on RFID tags for fault tolerance and security evaluation

Abstract

Abstract Radio frequency identification (RFID) is widespread and still necessary in many important applications. However, and in various significant cases, the use of this technology faces multiple security issues that must be addressed. This is mainly related to the use of RFID tags (transponders) which are electronic components communicating wirelessly, and hence they are vulnerable to multiple attacks through several means. Thus, it is challenging to evaluate the hardness of such devices. To tackle this problem, an extensive fault analysis is performed on an ultra-high frequency (UHF) tag architecture. Tens of millions of single-bit upsets (SBUs) and multiple-bit upsets (MBUs) faults have been emulated randomly on this tag architecture using an FPGA (field programmable gate arrays)-based emulation platform. The emulated faults have been classified into five groups according to faults effect on the tag behavior. Then, we propose a classification of emulated fault in function of MBU size and an error analysis with the aim of distinguishing between major and minor errors. Thus, experimentation results allowed a thorough evaluation of the tag robustness against MBUs. The proposed approach stands for an efficient means for studying tag architectures at the design level and evaluating their robustness and vulnerability to fault attacks and disturbances of harsh environments.