Impact of capacity fluctuation on throughput performance for semiconductor wafer fabrication

Abstract

Abstract With the characteristics of high capital investment and complicated manufacturing processes, effectively planning and analyzing the available capacity is a crucial challenge in semiconductor industry. However, the fab management staffs usually believe that the ideal planned capacity, generated by static capacity planning approach, is too optimistic to achieve, in particular, many abnormal events (e.g., machine breakdown) occurring in fab are not reasonably considered. Therefore, this paper aims at proposing a capacity impact analysis (CIA) approach based on a reasonable capacity plan generated by an object-oriented capacity planning simulation system. As such it analyzes the impact of the identified critical available time (AT) fluctuation of machines, the level of AT%, and the loading of machine on overall capacity and output performance (e.g., wafer out, utilization, WIP) in a fab. The simulation experiment shows that a capacity performance is highly affected by the machines belonging to a single machine-multiple layers (SM) machine group, and the level of AT% (i.e., not the AT fluctuation). Therefore, fab management staff should put more attention on the promised AT or increasing the level of AT% of the “key” machines to maintain a high throughput.