Microelectronics Reliability | 2019
Effect of TLP rise time on ESD failure modes of collector-base junction of SiGe heterojunction bipolar transistors
Abstract
Abstract Electrostatic discharge behavior of integrated SiGe heterojunction bipolar transistors is investigated by transmission line pulse (TLP) and transient interferometric mapping techniques. When stressing collector - base junction in reverse direction, two distinct non-thermal failure modes, depending on TLP pulse rise time (RT), have been found: For RT\u202f≥\u202f10\u202fns the observed failure at a critical voltage is attributed to base corner breakdown as supported by failure analysis. For RT\u202f≤\u202f5\u202fns the failure occurs due to parasitic capacitance coupling which virtually short-circuits the base-emitter junction at the pulse beginning and thus induces a parasitic bipolar action.