Q.U.A.I.N.T.P.E.A.X. QUantifying Algorithmically INTrinsic Properties of Electronic Assemblies via X-ray CT

Abstract

Electronic assemblies such as printed circuit boards (PCBs) and integrated circuits (ICs) require precise fabrication and process control of the electrical and mechanical properties. Microelectronic fabrication is a combination of additive methods, such as deposition of metal layers [18]; or subtractive, such as etching or milling [19]. This stack of layers in PCB or IC design creates the connectivity required for each device to operate functionally within a range of design specifications such as electrical resistance or impedance. The non-destructive verification of final assembled devices has become widespread with access to highenergy metrology equipment, demand for trusted devices [13], and to mitigate the complex defect-prone multilayer designs in PCB ( >8 Layer Lay-up) and IC (2.5D & 3D). Volumetric tools such as X-ray Micro Computed Tomography CT and Nano CT [9] are used to analyze the internal features of PCBs [5] and ICs [10] non-destructively. The automated quantification of these internal structures requires highresolution data to provide enough spatial resolution throughout the sample’s “sliced” volume. Each slice’s resolution in the volume represents the spatial resolution of the X-ray scan collection. To quantify internal structures such as signal traces or via connections the internal feature must be processed to separate or segment individual components enabling automated dimensional analysis or material property characterization. As the miniaturization of device geometries and the density of components increases, the labor resources required for manual segmentation of layered volumetric data becomes impossible.