A field programmable gate array based synchronization mechanism of analog and digital local oscillators in bandwidth-interleaved data acquisition systems.

Abstract

This paper studies the synchronization between the analog and digital local oscillators (LOs) in bandwidth-interleaved (BI) data acquisition systems (DAQS). It gives a detailed analysis of the random synchronization phase difference between the analog and digital LOs in the BI-DAQS among different acquisition frames. Exploiting the synchrony relation between the analog LO and sampling clock of the BI-DAQS, the synchronization between analog and digital LOs, where the digital LO is generated in the sampling clock domain, in each acquisition frame is realized in the Field Programmable Gate Array (FPGA). A BI-DAQS platform with a 5.5 GHz bandwidth and 20 Gs/s sampling rate is built to validate the proposed synchronization mechanism. Experimental results in the platform show the efficacy of the proposed synchronization mechanism, which consumes only a small amount of the flip-flops and look-up tables in the FPGA without any additional hardware assistance.