High-quality SiN x /p-GaN metal-insulator-semiconductor interface with low-density trap states

Abstract

We report on a high-quality p-GaN metal-insulator-semiconductor (MIS) capacitors with sharp interface morphology and the lowest interface trap density by using SiN x as the gate dielectric layer. Transmission electron microscopy and x-ray photoelectron spectroscopy (XPS) analysis revealed a high-quality interface morphology with the effective removal of carbon and oxygen impurities. Better than the interface properties of Al2O3, SiO2, and CaF2/p-GaN metal-oxide-semiconductor (MOS) or MIS capacitors, the capacitance-voltage measurements of SiN x /p-GaN showed negligible electrical hysteresis after a two-step surface pre-treatment, leading to the lowest trapped charge density of 5 × 1010 cm−2. The interface state density distribution was also reduced to be ~1–2 × 1012 cm−2 eV−1 at E t –E v = 0.2–0.45 eV and 3–5 × 1012 cm−2 eV−1 near the valance-band edge after the treatments. The achievement of the high-quality MIS interface was attributed to the suppression of the Mg-Ga-O interfacial disordered layer by the effective surface treatments and oxygen-free deposition process, which was usually observed at Al2O3/p-GaN MOS interface.