Archive | 2019

Design a precise stability controller for high power pulse modulator based on FPGA

 
 
 
 
 

Abstract


Shanghai Soft X-ray Free Electron Laser Test Facility (SXFEL-TF) has been fulfilled the construction assignments and passed the acceptance check at Shanghai Institute of Applied Physics (SINAP), Chinese Academy of Sciences. The stability of microwave system is one of the major factors to get better beam performance. It is mainly determined by klystron and modulators power supply. The beam voltage stability of pulse modulator, which is the cathode voltage source of the microwave amplifier, is directly affecting the microwave amplitude and phase. The requirement of the microwave stability is 0.04% (rms) for amplitude and 0.05% (rms) for phase tolerance. This paper shows the design considerations of stability improvement and suitable upgrade scheme of the controller for Shanghai SXFEL pulse modulator. INTRODUCTION SXFEL-TF is an X-ray Free Electron Laser (XFEL) facility, which has been accomplished at shanghai institute of Applied Physics (SINAP), Chinese Academy of Sciences. This facility is located close to Shanghai Synchrotron Radiation Facility (SSRF) which is the first 3rd generation light source in China. [1] SXFEL-TF consists of a 130 MeV photocathode injector, a main LINAC enhancing the beam energy to 840 MeV, an undulator system with two stages of HGHG-HGHG or EEHG-HGHG scheme and a diagnostic beamline. In the main Linear Accelerator (LINAC) C -band accelerator structure was first used at SINAP. Main parameters of C-band microwave system were listed in Table 1. In order to achieve High-gradient and compact, six C-band microwave acceleration units were used, which can achieve a high acceleration gradient of 40 MV/m [2-3]. Table 1: Parameters of C-band Microwave System Parameters Value Microwave Frequency (MHz) 5712 Repetition Rate (Hz) 10 Hz Peak Power (MW) 50 MW Microwave Pulse Width ( s) 2.5 Amplitude Stability (ppm) 400 Phase Tolerance (deg.) 0.18 Microwave system is mainly consist of klystron and modulator, which requests very stable amplitude stability and very tight tolerances of phase jitter. The performance of microwave system is one of the major factors to get great beam performance. It is mainly determined by a low level microwave driving system and klystron modulators. The beam voltage of the modulator, which is the pulsed power source of the microwave amplifier klystron, directly affects the microwave amplitude and phase. Beijing Electron Positron Collider is studying a deQing circuit aiming at improving the stability of less than 0.15% [4]. De-Qing circuit is a conventional method of regulating the PFN charging voltage. The LINAC Coherent Light Source (LCLS) at Stanford Linear Accelerator Centre (SLAC) improves the pulse-to-pulse stability of the modulator by using solid state modulator [5]. The stability of the existing SSRF LINAC modulator which is used a capacitor-charging power supply (CCPS) charging the Pulse Forming Network (PFN), has achieved 0.05% [6-7]. It doesn’t meet the requirements for SXFEL. This paper shows the suitable upgrade scheme of pulse modulators and the stability improvement design considerations of pulse modulators for Shanghai SXFEL. Traditional controller of pulse modulator is mostly based on Programmable Logic Controller (PLC). We add a new circuit based on Field Programmable Gate Array (FPGA) to regular the PFN charging voltage. The relevant stability experiment indicates that pulse to pulse stability of the modulator can meet the requirement of SXFEL. UPGRADE SCHEME OF CONTROLLER In order to upgrade pulse to pulse stability of pulse modulator, an upgrade control system was developed. The schematic diagram of stability controller is shown as Fig. 1. We present a real time feedback control system of LINAC pulse modulator to improve PFN charging voltage. The feedback control system is based on embedded FPGA techniques. It consists of an embedded NIOS II processor, a High resolution Analog to Digital Convertor (ADC) and an upper computer. The NIOS II processor manage on chip memory, ADC connector, direct memory access (DMA) function, interrupt request (IRQ) function, and ethernet communication. Figure 1: Schematic diagram of stability controller. ___________________________________________ * Work supported by the National Natural Science Foundation of China (NO.11675250). † email address [email protected] Th is is a pr ep ri nt — th e fin al ve rs io n is pu bl ish ed w ith IO P 10th Int. Partile Accelerator Conf. IPAC2019, Melbourne, Australia JACoW Publishing ISBN: 978-3-95450-208-0 doi:10.18429/JACoW-IPAC2019-THPRB041

Volume 1350
Pages 12158
DOI 10.1088/1742-6596/1350/1/012158
Language English
Journal None

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