Hybrid Access in Storage-class Memory-aware Low Power Virtual Memory System

Abstract

With the rapidly growing demands for large capacity main memory in server systems and embedded systems, current DRAM-only approach is hitting the limit due to DRAM s capacity scaling issue and significant background power. With the emergence of storage-class memories (SCMs), we can explore low power, high speed, cheap, and high capacity unified memory system by redesigning virtual memory system in order to efficiently manage the new memory hierarchy of SCM/DRAM. In this paper, we propose hybrid access which is a memory hierarchical control method that adaptively switches between SCM-aware low power aggressive paging (AP) with small DRAM as cache and direct access (DA) to memory bus attached byte-addressable SCM according to data access patterns. Furthermore, we propose an auto-tuning framework that dynamically predicts the optimal control and the optimal DRAM size when AP is selected, based only on time series performance data that can be collected at low cost, using optimal control prediction model generated by machine learning (ML). We show that hybrid access has potential to realize efficient unified main memory applicable to a wide range of data access patterns with modest size DRAM.