The Performance Analysis of 70nm T-gate InAlN/AlN MOS-HEMT using Graded Buffer

Abstract

In this paper, we have proposed the 70nm T-gate InAlN/AlN MOS-HEMT with graded buffer. The gate oxide and graded buffer effect on DC and analog parameters are investigated and briefly compared with the standard GaN-HEMT structure. It has been observed that linearly grading the Al composition in the buffer layer significantly enhances the device s performance. Various analog FOMs such as transconductance (gm), output conductance (gd), transconductance generation factor (TGF), intrinsic gain (Av), early voltage (VEA) have been investigated using the Silvaco-Atlas simulator. Simulated results confirmed that grading the buffer layer and using the high k-gate dielectric significantly enhance the switching ratio (1014), transconductance (900mS/mm), and improve all the analog FOMs, which confirmed the suitability of the proposed device for digital and analog applications.