2019 IEEE 21st Electronics Packaging Technology Conference (EPTC) | 2019
Effect of Accelerated Thermal Cyclic Loading on Structural Reliability of Cu-filled TSV
Abstract
Through Si Via (TSV) has emerged as one of the promising technologies for the 3D integration of the microelectronics packages. However, difference in the coefficient of the thermal expansion of Si and Cu leads to generation of large thermal stresses in these structures when subjected to thermal excursions either during post fabrication processes or service period due to on-off cycles of device. In here, accelerated thermal cycling tests were carried out in the temperature range of −50 to 150°C with two different heating cooling rates on the TSV samples. It was observed that slow heating-cooling cycling causes extrusion of few Cu grains near the Cu-Si interface which was not observed when samples were subjected to the fast-thermal cycling. Also, at few locations along the interface, Cu-Si reaction occurrence signs were observed. Finite element analysis (FEA) which was performed to gain more insights into the experimental results suggests that creep strain accumulated near interface of Cu-Si was higher in the magnitude in case of the slow thermal cycling compare to the faster one. From the stress measurement using the FEA, it was also understood that the Cu-Si interface gets subjected to large stresses during thermal cycling. Therefore, it can cause the degradation of the diffusion barrier layer and can pave the pathway for the Cu-Si reaction to happen.