OA Verilog AMS Consistency Validation in logical Library with Different Technological Standards from 16 to 40 nm

Abstract

Logic element libraries are widely used in the design of modern digital blocks. One type of design data provided is OA Verilog AMS. It simulates the behavior of blocks and engineering systems for analog and mixed signals. The problem of developing a unit test for checking this data in the conditions of using libraries with different technological standards is investigated. Studied and compared with similar verification in integration tests. As a result, the advantages and disadvantages of the developed test are shown. The specifics of working on different technology libraries, as well as the advantages and disadvantages in comparison with the implementation of verification through the block of integration tests.