Impact of the Backgate on the Performance of SOI UTBB nMOSFETs at Cryogenic Temperatures

Abstract

In this paper we present an experimental investigation on SOI UTBB n-MOSFETs at cryogenic temperatures. The device has a silicide source/drain with dopant segregation formed by Implantation Into Silicide (IIS) process. The controllability of the back-gate (Vback) on the device performance is characterized, showing that Vback is essential to tune the threshold voltage Vth and improve the subthreshold swing SS, Drain-Induced Barrier Lowering DIBL and mobility at cryogenic temperatures. The cryogenic effect on Vth, SS and DIBL with different Vback is also studied. Furthermore, using the Vback and quantization effect at cryogenic temperature, we can optimize the SS to a lower value, providing a potential way to get ideal value of SS at cryogenic temperature.