2019 29th International Conference on Field Programmable Logic and Applications (FPL) | 2019

Preallocating Resources for Distributed Memory Based FPGA Debug

 
 

Abstract


Most internal FPGA debug methods require the use of Block-RAM (BRAM) memory for trace buffers. Recent work has shown the viability of replacing BRAMs with distributed, LUT based memory. Distributed memory (DIME) trace buffers are lean and can be utilized in large designs where other debug methods are unlikely to fit. Since LUTs are abundant on FPGA devices, there are nearly always some left unused after the user s design is placed, even for designs that utilize more than 90% of the FPGA s resources. DIME trace buffers are inserted into highly utilized designs within minutes using RapidWright. In this paper we contrast the previously used method of scavenging leftover LUT resources with a preallocation scheme that ensures a certain amount of memory LUTs are left available for distributed memory trace buffers. While causing virtually no penalty to the user design, preallocating memory LUT resources allows the very largest designs to utilize higher numbers of distributed memory trace buffers at lower timing penalties. We also show that depth of DIME trace buffers can be extended from 16 to 256 bits.

Volume None
Pages 384-390
DOI 10.1109/FPL.2019.00067
Language English
Journal 2019 29th International Conference on Field Programmable Logic and Applications (FPL)

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