Hardware Implementation of Series Arc Fault Detection Algorithm for Different DC Resistive Systems

Abstract

Without zero-crossings, dc series arc faults result in much more serious safety threats. As the dc voltage level rises and the system capacity increases, series arc faults appear in dc systems more frequently. To eliminate their damages, specific arc fault circuit interrupters (AFCI) should be developed. In this paper, two kinds of dc systems are considered in the designed experimental setup. Firstly, a dc simulated source with the ac-dc-dc structure is connected to a resistor. This source could act as a constant voltage or photovoltaic (PV) source by operating in different U-I output modes. Then a real PV array outputting the nonlinear U-I output curve is also conducted as a comparison. Next, a simple detection algorithm is proposed based on the established time-domain detection variable. Finally, this series arc fault detection algorithm is implemented using a digital signal processing (DSP) chip. The performance of this hardware behaves satisfying under various system transitions and multiple arc fault conditions with diverse operation points and current levels.