High Capability and Low-Complexity: Novel Fault Detection Scheme for Finite Field Multipliers over GF(2m) based on MSPB

Abstract

Fault detection is becoming more and more essential to the cryptographic circuits protection (for the purpose of fighting against both natural and malicious faults). While finite field multiplier is regarded as the bottleneck arithmetic unit for cryptosystems such as elliptic curve cryptography, efficient implementation of finite field multiplier with high fault detection capability is still missing in the literature. In this paper, therefore, we propose a novel fault detection scheme for finite field multipliers over GF(2m), where the proposed work aims at obtaining high fault detection performance for finite field multipliers and meanwhile maintain low-complexity implementation. To successfully carry out the proposed design strategy, we have used the modified shifted polynomial basis (MSPB) to represent the field and have conducted three coherent interdependent stages of efforts: (i) a novel 1-bit parity based detection scheme for bit-serial MSPB multiplier is presented after thorough mathematical derivation; (ii) a novel Toeplitz matrix-vector product (TMVP)-based multi-bit parity detection scheme for digit-serial MSPB multiplier is proposed then to obtain both high detection performance and low-complexity implementation; (iii) detailed complexity analysis and comparison show that the proposed designs have significantly better performance over the best of existing ones. For instance, for the bit-serial multipliers, the proposed design (using 1 parity bit) can achieve around 99.49% fault detection performance while the best existing one with 2-bit parity checking scheme achieves only 75.12% fault detection. The proposed scheme, because of its high fault detection capability and low-complexity, can be extended further in many cryptographic applications.