A Zero-Crossing-Based Integrator with Bidirectional Two-Phase Charging and Selective-Reset Operations for ΔΣ ADCs

Abstract

Zero-Crossing-Based Integrators (ZCBIs) are energy- efficient alternatives to conventional switched-capacitor integrators that are typically implemented using operational transconductance amplifiers (OTAs). However, ZCBIs suffer from signaldependent overshoot errors and increased dynamic power consumption due to inherent reset operation. This paper presents a ZCBI that employs a bidirectional two-phase charging scheme and performs the reset operation selectively. A 3rd-order DeltaSigma modulator has been fabricated in a 28-nm CMOS technology using the proposed integrators. The prototype modulator achieves 67-dB SNR and 63-dB SNDR over the bandwidth of 196 kHz with an oversampling ratio of 64. It consumes 184 pW, which translates to the figure-of-merits of 154 dB (FoMs) and 390 fJ/conv-step (FoMw).