2021 IEEE International Solid- State Circuits Conference (ISSCC) | 2021

A Fully-Integrated 40-nm 5-6.5 GHz Cryo-CMOS System-on-Chip with I/Q Receiver and Frequency Synthesizer for Scalable Multiplexed Readout of Quantum Dots

 
 
 
 
 
 

Abstract


Quantum computing holds the promise to solve many of today’s intractable problems. A solid-state quantum computer (QC) is generally made of an array of qubits implemented in one of many solid-state technologies and operating at deep-cryogenic temperatures (10-to-20mK). Silicon spin qubits are a promising candidate for scalable QCs, due to their size, long coherence times and potential for co-integration with the required classical control and readout electronics. Recently, semiconductor spin qubits have been demonstrated to operate at $\\sim 1\\mathrm{K}$, thus accelerating the achievement of a compact QC [1]. Classical qubit control electronics has also progressed, with the demonstration of fully-integrated control of spin qubits [2] and transmons [3] implemented in a cryo-CMOS technology. While a cryo-CMOS integrated circuit has been co-integrated with quantum dots [4], fully-integrated readout electronics has not yet been addressed in the literature.

Volume 64
Pages 210-212
DOI 10.1109/ISSCC42613.2021.9365758
Language English
Journal 2021 IEEE International Solid- State Circuits Conference (ISSCC)

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