A Compact Mixed-Mode 62 GHz Doherty Power Amplifier with 28.9% Peak PAE and 14.2 dBm OP1dB Using Dynamic Power Allocation

Abstract

This paper presents a 62 GHz, mixed-mode compact Doherty Power Amplifier (DPA) with high linearity and efficiency implemented in a 65-nm CMOS technology. The DPA adopts a novel linearity boosting and efficiency enhancement technique by introducing a dynamic-power-allocation mechanism which is realized by a coupler-based power divider and a mixed-mode DPA architecture. By adjusting the control voltages of the PA in the gain stage, the input power allocated to both paths change, leading to a measured $OP_{1dB}$ increase from 11.72 dBm to 14.2 dBm, a maximum 15.6 dBm output power and a 9.09% PAE improvement at the 1-dB compression point. A novel compact three-coil-coupled transformer along with an output matching capacitor are proposed as the power combiner, output matching network, balun, and impedance inverter. The core part of the fabricated DPA occupies an area of 0.04 mm2, exhibits a 15.6 dBm saturated output power, a peak power gain of 19 dB, an OP1dB of 14.2 dBm, with a 28.9% peak power-added efficiency (PAE), and a 27.2% PAE at 1-dB compression point, and a 12.7% PAE at 6-dB back-off. The DC power consumption of the PA is only 68 mW.