IEEE Journal of the Electron Devices Society | 2021
A Novel SiC Asymmetric Cell Trench MOSFET With Split Gate and Integrated JBS Diode
Abstract
A novel high performance SiC asymmetric cell trench MOSFET with split gate (SG) and integrated junction barrier schottky (JBS) diode (SGS-ATMOS) is proposed for the first time. The shielding effect provided by the SG structure not only reduces the gate-drain capacitance (<inline-formula> <tex-math notation= LaTeX >${C}_{\\mathrm{gd}}$ </tex-math></inline-formula>) but also alleviates the electric field crowding in the dielectric layer at trench corner. The integrated trench JBS diode bypasses the PiN body diode while obtaining good double protection from the SG and p-type shielding region. Therefore, not only the MOSFET but also diode performance is significantly improved for the proposed structure. Numerical analysis results show that compared with the conventional asymmetric cell trench MOSFET (Con-ATMOS), the high frequency figure of merit (HFFOM<sup>1</sup>, <inline-formula> <tex-math notation= LaTeX >${R}_{\\mathrm{on}} {\\cdot } {C}_{\\mathrm{gd}}$ </tex-math></inline-formula>) is reduced by 92.5% and the Baliga figure of merit (BFOM, <inline-formula> <tex-math notation= LaTeX >${BV}^{2}/R_{\\mathrm{on,sp}}$ </tex-math></inline-formula>) is increased by 57.2%, respectively. In addition, the forward conduction voltage drop (<inline-formula> <tex-math notation= LaTeX >${V}_{\\mathrm{F}}$ </tex-math></inline-formula>), reverse recovery charge (<inline-formula> <tex-math notation= LaTeX >${Q}_{\\mathrm{rr}}$ </tex-math></inline-formula>) and peak reverse recovery current (<inline-formula> <tex-math notation= LaTeX >${I}_{\\mathrm{rrm}}$ </tex-math></inline-formula>) of the diode are reduced from 3.10V, <inline-formula> <tex-math notation= LaTeX >$1.95\\mu \\text{C}$ </tex-math></inline-formula>/cm<sup>2</sup> and 68.0A for the Con-ATMOS to 1.56V, <inline-formula> <tex-math notation= LaTeX >$0.97\\mu \\text{C}$ </tex-math></inline-formula>/cm<sup>2</sup> and 35.9A for the proposed SGS-ATMOS, respectively. Compared with the Con-ATMOS, the turn-on loss (<inline-formula> <tex-math notation= LaTeX >${E}_{\\mathrm{on}}$ </tex-math></inline-formula>) and turn-off loss (<inline-formula> <tex-math notation= LaTeX >${E}_{\\mathrm{off}}$ </tex-math></inline-formula>) of the proposed device are reduced by 33.3% and 33.0%, respectively. The <inline-formula> <tex-math notation= LaTeX >${E}_{\\mathrm{on}}$ </tex-math></inline-formula> and <inline-formula> <tex-math notation= LaTeX >${E}_{\\mathrm{off}}$ </tex-math></inline-formula> of the proposed device are also 33.6% and 30.0% off compared with the Con-ATMOS with external JBS diode, respectively. The temperature characteristics of the SGS-ATMOS are also discussed and it is found that the proposed device exhibits good performance at high temperature.