IEEE Journal of Photovoltaics | 2019
From PERC to Tandem: POLO- and p+/n+ Poly-Si Tunneling Junction as Interface Between Bottom and Top Cell
Abstract
We present a novel cell concept that combines the tandem cell approach with the passivated emitter and rear cells (PERC) mainstream technology. As an interface between Si bottom and top cell, we utilize passivating n<sup>+</sup>-type polysilicon on oxide (POLO) contacts and a p<sup>+</sup> poly-Si/n<sup>+</sup> poly-Si tunneling junction. Our full area PERC+ Si bottom cells are fabricated within a typical industrial process sequence where the POCl<sub>3</sub> diffusion and SiN<sub>x</sub> deposition are replaced by the POLO junction formation processes. The implied open-circuit voltage i<italic>V</italic><sub>oc</sub> that is measured on these devices reaches up to 708\xa0mV (684\xa0mV) under 1\xa0sun (under filtered spectrum to simulated top cell absorption). On sister cells with planar front side, the respective i<italic>V</italic><sub>oc</sub> values are 718\xa0mV (696\xa0mV). In order to understand the device physics of our ultra-abrupt p<sup>+</sup> poly-Si/n<sup>+</sup> poly-Si tunneling junction, we determined the carrier lifetime in the poly-Si by time-resolved photoluminescence. The extracted lifetimes of 42–54\xa0ps enter as input parameter for numerical Sentaurus Device simulations. These simulations reveal the importance of band-to-band and trap-assisted tunneling for a low tunneling junction resistivity of 2.95\xa0mΩ·cm<sup>2</sup>. Experimentally, an upper limit for the combined junction resistance of the p<sup>+</sup> poly-Si/n<sup>+</sup> poly-Si/SiO<sub>x</sub> stack of 100\xa0mΩ·cm<sup>2</sup> is determined.