IEEE Solid-State Circuits Letters | 2021

A 94.2-dB SNDR 142.6-μW VCO-Based Audio ADC With a Split-ADC Differential Pulse Code Modulation Architecture

 
 

Abstract


This letter presents a voltage-controlled oscillator (VCO)-based analog-to-digital converter (ADC) for audio applications using differential pulse code modulation (DPCM) to mitigate VCO voltage-to-frequency nonlinearity. To overcome VCO gain variation, a split-ADC architecture is employed where two sub-ADCs share one calibration unit, thereby enabling a quasideterministic background gain calibration with small delay and fast convergence speed. In addition, a hybrid dynamic element matching (DEM) is employed, which offers a lower delay and a smaller in-band mismatch noise compared to the segmented-tree DEM. Fabricated in 65 nm, the ADC achieves 94.2-dB SNDR, 97.3-dB SNR, and 100.3-dB DR in 20-kHz bandwidth while dissipating 142.6-μW power, yielding a DR-based FoM of 181.8 dB.

Volume 4
Pages 121-124
DOI 10.1109/LSSC.2021.3092020
Language English
Journal IEEE Solid-State Circuits Letters

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