2019 32nd IEEE International System-on-Chip Conference (SOCC) | 2019

A 100-mVpp Input Range 10-kHz BW VCO-based CT-DSM Neuro-Recording IC in 40-nm CMOS

 
 
 
 
 

Abstract


This paper presents a time-domain continuous-time sigma delta modulator (CT-DSM) based neuro-recording interface circuit. This circuit consists of a current-reuse fully differential OTA, a voltage-controlled oscillator (VCO), a counter-based quantizer and a capacitive DAC feedback circuit with Data Weighted Averaging (DWA) logic. A current-reuse Gm cell is adopted to suppress the input-referred noise with high energy efficiency. The VCO converts the input signal amplitude into phase for integration as well as quantization by the counter-based quantizer. The DAC feedback circuit ensures a linear operation of Gm-VCO within the input range. The prototype circuit is designed and implemented in a commercial 40-nm CMOS process. the proposed circuit consumes 19.5 $\\mu$ W under 1.2-V supply voltage. With the maximum tolerable input swing of 100-mVpp, the proposed circuit achieves an SNDR of 59 dB over a bandwidth of 10 kHz. The proposed design is suitable for application such as the neuro-recording circuit in the closed-loop neural stimulation system.

Volume None
Pages 466-470
DOI 10.1109/SOCC46988.2019.1570553458
Language English
Journal 2019 32nd IEEE International System-on-Chip Conference (SOCC)

Full Text