A Comparative Modeling Analysis of Optimized Multilevel Inverter Topologies with Reduced Device Count for SPV and Wind Integration

Abstract

A large number of advantages are offered by multi level inverters and hence a number of topologies are proposed over the years. There has been an evolution of new topologies with reduced number of switching devices. Not a single topology is enough for all the applications, so these topologies are developed with orientation based upon the application. Some topologies suites one application but do not suite well to the other application. The paper presents a comparative modelling analysis of a number of multilevel inverter topologies with reduced device count with the purpose of proposing the better options out of reduced device count topologies for economic optimization of grid interface inverter.