Novel Radiation Hardening Read/Write Circuits Using Feedback Connections for Spin–Orbit Torque Magnetic Random Access Memory

Abstract

With downscaling of process technology, conventional memories encounter challenges, such as soaring static power, low reliability, and charge sharing effect induced by radiation effects. Magnetic random access memory (MRAM) is considered as an outstanding candidate for addressing these challenges. In particular, emerging spin–orbit torque (SOT) MRAMs have shown ultra-fast switching and read-disturbance immunity compared with spin-transfer torque MRAMs. However, the write operation of the SOT-MRAM is more vulnerable to single-event upsets (SEUs) as its ultra-short write pulse is comparable to the radiation current pulse. In addition, its read circuit can also be disturbed by SEUs or even double-node upsets (DNUs) induced by the charge sharing effect. In this paper, we investigate radiation effects on read/write circuits of the SOT-MRAM. Then, we propose novel radiation hardening designs for SOT-MRAM. The hardening technique is first studied at the write circuit by adding six PMOS transistors as a feedback structure to charge/discharge. Afterwards, we propose a radiation hardening read circuit addressing the issue of SEUs and DNUs, which uses redundant six transistors and two feedback connections as the hardening structure. Based on a physics-based SOT magnetic tunnel junction model and a 65-nm complementary metal–oxide–semiconductor design kit, simulation results indicate that radiation-induced soft errors can be corrected at sensitive nodes. Moreover, the error rate of the proposed read circuit is $40\\times $ smaller than the previous work, and restoring time is reduced by 30.6% with negligible area overhead.