Performance Study of Different PLL Schemes Under Unbalanced Grid Voltage

Abstract

Phase locked loop (PLL) circuit tracks continuously, the fundamental angular frequency of the grid voltage. There are many PLL techniques introduced in the past decades. Some of the techniques only give good results in normal grid voltage, and some techniques give good results in both normal and abnormal grid voltage conditions. The performance of five different PLL techniques: an abc Reference Frame PLL, a Stationary Reference Frame PLL (αβ-PLL), a Synchronous Reference Frame PLL (dq-PLL), a Voltage Reforming Synchronous Reference Frame PLL (VRSR-PLL), a Decoupled Double Synchronous Reference Frame PLL (DDSRF-LL); are analyzed in this paper under three grid voltage conditions: a set of three-phase balanced voltages, a set of three-phase unbalanced voltages in magnitudes and a set of three-phase unbalanced voltages in magnitudes and phases. The work suggests some improvements in the basic PLL techniques so that the performance of the PLLs are improved. A comparison table is included for selection of the appropriate PLL scheme depending on the condition of the grid voltage.