Proceedings of the 2019 on Great Lakes Symposium on VLSI | 2019

Thermal Fingerprinting of FPGA Designs through High-Level Synthesis

 
 

Abstract


This work investigates if temperature can be used to fingerprint FPGA designs and presents a method to generate a large number of functionally equivalent FPGA designs such that each design has a unique distinguishable thermal signature. The main methodology behind this work is based on the design space exploration of each hardware accelerator in the design specified as a behavioral description (e.g. ANSI-C, C++ or SystemC) to obtain a trade-off curve of designs with unique area vs. performance trade-offs as well as a third dimension that consists of the difference in their thermal profle. Experimental results, prototyping different hardware accelerators on a FPGA, and using a high resolution infrared camera, show the usability of our proposed method, which is able to distinguish between the different design versions and hence can serve to detect if an FPGA design is unlawfully being used.

Volume None
Pages None
DOI 10.1145/3299874.3318030
Language English
Journal Proceedings of the 2019 on Great Lakes Symposium on VLSI

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