Reservoir Computing Using Networks of CMOS Logic Gates

Abstract

Reservoir computing is a brain-inspired architecture for machine learning, capable of rapid time series processing. A recurrent neural network called a reservoir is created, and a simple trained readout map is applied to the reservoir state. A real-world dynamical system at the edge of criticality can be used as a reservoir for information processing in place of a software model. In this paper we test the dynamics of a reservoir comprised of discrete digital logic chips on a printed circuit board. The logic gates run freely without a clock, exhibiting complex behavior that expands an input into a higher dimensional representation. By testing these circuits in a dataset-agnostic manner, we identify promising configurations for machine learning. We demonstrate that the reservoir circuit substantially improves the accuracy of a simple classifier on a noisy waveform classification machine learning task.