Co-integration of single transistor neurons and synapses by nanoscale CMOS fabrication for highly scalable neuromorphic hardware

Abstract

\n Co-integration of multi-state single transistor neurons and synapses was demonstrated for highly scalable neuromorphic hardware, using nanoscale complementary metal-oxide-semiconductor (CMOS) fabrication. The neurons and synapses were integrated on the same plane with the same process because they have the same structure of a metal-oxide-semiconductor field-effect transistor (MOSFET) with different functions such as homotype. By virtue of 100% CMOS compatibility, it was also realized to co-integrate the neurons and synapses with additional CMOS circuits, such as a current mirror and inverter. Such co-integration can enhance packing density, reduce chip cost, and simplify fabrication procedures. Neuronal inhibition and tunability of the firing threshold voltage were demonstrated for an energy efficient and reliable neural network. The multi-state single transistor neuron with low peak power consumption of 120 nW that can control neuronal inhibition and the firing threshold voltage was achieved. Spatio-temporal neuronal functionalities are demonstrated with analyses of a fabricated neuromorphic module, which is composed of a single transistor neuron and a set of single transistor synapse. Image processing for letter pattern recognition and face image recognition is performed using a hardware-based circuit simulation and a software-based neuromorphic simulation, respectively.