A 65W Power Amplifier Without Load Modulation to Achieve 50% Efficiency at 8dB Power Back-Off over 1.8-2.5 GHz

Abstract

This paper presents the design and characterization of a new power amplifier architecture that aims to achieve higher back-off (BO) efficiency than Doherty power amplifiers (DPAs) when using signals with large Peak-to-Average-Power-Ratio (PAPR). The proposed topology is based on splitting the main amplifier into two parallel amplifiers biased in Class-AB and Class-C respectively to mitigate the extra quiescent current loss in a DPA at deep power back-off. The demonstrator PA, that operates from 1.8 to 2.5GHz, exhibits a peak output power of 48.4±0.4dBm and efficiency between 50-62% at 8dB output back-off (OBO). Modulated measurements, using 20MHz LTE signal with 8dB PAPR, show an average output power of 10W and adjacent channel leakage ratio (ACLR) lower than −53dBc.