Opportunities in topological insulator devices
FFabrication of topological insulator devices
Oliver Breunig & Yoichi Ando ∗ Physics Institute II, University of Cologne, Z ¨ulpicher Str. 77, 50937 K ¨oln, Germany ∗ Corresponding author. email: [email protected]
Abstract
Topological insulators are expected to be a promising platform for exciting quantum phenomena,whose experimental realizations require sophisticated devices. However, topological-insulatormaterials are generally more delicate than conventional semiconductor materials and thefabrication of high-quality devices has been a challenge. In this Expert Recommendation, wediscuss the nature of this challenge and present useful tips for successful device fabrications,taking superconducting and ferromagnetic devices as concrete examples. We also recommendsome promising future directions.
After more than 10 years of research, the understanding of topological insulator (TI) materials has been well advanced. The next step is to use them as a platform for devices to realize noveland useful topological phenomena, such as emergence of chiral Majorana fermions
2, 3 , topologicalqubits using Majorana zero-modes
4, 5 , or topological magnetoelectric effects in the axion insulator1 a r X i v : . [ c ond - m a t . m e s - h a ll ] J a n tate . Also, mesoscopic physics of the topological states of matter is a rich realm , but it has beenlargely left unexplored. Hence, TI devices provide promising opportunities for new discoveries.However, almost all known TI materials are much less robust against device fabricationscompared to typical semiconductor materials such as Si or GaAs. Also, the functionally activepart of TIs is the surface states and the bulk conduction should be suppressed as much as pos-sible. These circumstances make it important to accumulate fabrication know-hows specificallydeveloped for TI devices. Already, various kinds of TI devices have been fabricated, allowingfor observations of interesting phenomena peculiar to TIs
2, 9–15 . This Expert Recommendation isaimed at helping researchers to save their efforts by providing some key know-hows and givingthe general audience a concise view on the interesting technical challenges that TI materials posebefore being used for ambitious purposes.In the following, we provide concrete device fabrication tips and describe the techniquesthat are relevant to TI devices, focusing on tetradymite TI materials . In particular, we discusssuperconducting devices in detail, because they are currently the most active and interesting areasof TI device research. We expect that our recommendation will promote high-quality experimentson TI devices in future. TIs are characterized by a nontrivial Z topology of their bulk electronic wave functions, whichleads to the appearance of topologically-protected Dirac surface states . The most important prop-2rty of the topological surface states is the spin-momentum locking, which lifts the spin degeneracyand dictates the spin orientation depending on the momentum k . In fact, this property makes TIs apromising platform for topological superconductivity or spintronic devices.In this article, we will discuss TI-based superconducting devices in detail, but there are ofcourse many other types of TI-based devices that are promising for the research of topological phe-nomena and their applications. One interesting avenue would be to utilize a quantum anomalousHall insulator (QAHI), i.e., ferromagnetic topological insulators whose chemical potential is tunedinto the magnetic exchange gap opened at the Dirac point. By orienting the magnetization of thetop and bottom surfaces in opposite directions, one can realize an axion insulator , in which chargepolarization will induce bulk magnetization with the proportionality coefficient equal to fine struc-ture constant α ( = e / (cid:126) c ); this is called topological magnetoelectric effect . Also, by inducingsuperconductivity in a QAHI via proximity effect, one can generate chiral Majorana fermions atthe edges. There are already experimental works along this line
2, 3 , but the generation of chiralMajorana fermions remains controversial .Another fruitful direction is TI-based spintronic devices. While the current-induced spin-polarization on the TI surface has been demonstrated , the efficiency of the spin generation in thediffusive transport regime is inherently low . On the other hand, in the ballistic transport regime,the spin-momentum locking means that a 100% spin polarization is expected in theory. Hence,TI-based nanodevices to pursue this avenue would be very useful. Yet another interesting directionis TI-based nanodevices to address mesoscopic physics of TIs. In this regard, the size quantization3n TI nanowires leads to a gap opening and the formation of spin-degenerate subbands
8, 18 , but thespin degeneracy of the subbands (as well as the gap at the Dirac point) can be manipulated by amagnetic flux threading the nanowire axis. The tunability of the spin degeneracy would lead to anovel mesoscopic effect, which can only be detected in nanodevices.
There are three main challenges when fabricating devices made out of TIs — preserving the insu-lating bulk, protecting the surface states, and being able to control the surface states by tuning theFermi level relative to the Dirac point.
Preserving the insulating bulk
Devices based on TIs are most exciting due to the peculiar prop-erties of their conducting surface states. Their contribution can be enhanced not only by usingthin films and exfoliated flakes to achieve a large surface-to-bulk ratio, but also by tuning the ma-terials growth such that the chemical potential lies within the bulk band gap. Given the term of“topological insulator ”, the insulation of the bulk may seem like a natural property of these ma-terials. However, due to naturally-occurring self-doping, most of the TI compounds such as thebinary tetradymite Bi Se , Bi Te , or Sb Te conduct in their bulk. Nevertheless, the experimen-tal challenge to realize a truly insulating bulk has been overcome by “compensation” of dopants,which can be achieved, for example, in the solid-solution of tetradymite compounds having op-posite types of naturally-occurring carriers . Two widely-used materials belong to this class —(Bi x Sb − x ) Te (hereafter called BST) for thin films and Bi − x Sb x Te − y Se y (called BSTS) for4ulk crystals .Upon device fabrication, it is crucial to retain the insulation of the bulk. Since a major benefitof devices is to have the possibility of gate-tuning the chemical potential, the large density of statescoming from conducting bulk would prevent any efficient tuning due to screening, spoiling thisbenefit. This requires special care that the chemical composition of the TI to be kept intact by notheating the sample too much during the resist baking or depositions of metals and dielectrics; inthe cases of BST films and BSTS flakes, the recommended maximum temperature is 120 ◦ C. Protecting the surface states
It is important to note that the surface of BST and BSTS are ox-idized in ambient atmosphere. This oxidation causes electron doping, but besides that, there hasbeen no evidence that oxidation degrades the electron mobility in the surface states — mostlikely, the surface states just migrate beneath the oxide layer without experiencing enhanced scat-tering. On the other hand, the oxide layer poses a problem upon taking ohmic contacts or inducingsuperconductivity through a metal/superconductor deposited on the surface. The oxidation can beavoided by capping the TI surface with, for example, Te or Al O . To remove the oxide layer, wetetching (described later) is recommended over dry etching.Also, not damaging the surface during the device fabrication is important for keeping themobility of the surface states; when in-situ cleaning of the surface using Ar plasma is performedbefore deposition of metals, the plasma power should be kept to a minimum.5 ontrolling the surface states For electrostatic gating, the thickness of the film or flake is de-cisive. It should be thin enough to sufficiently reduce residual bulk conductivity and to allow formicrofabrication — typical resist for lithography impose an upper limit of roughly 100 nm on therange of useful TI thicknesses. Yet, even down to about 20 nm a single gate electrode can only tunethe electron density of only one of the two (top or bottom) surfaces effectively. Additionally, theinterface-dependent band bending effects introduce asymmetry between the two surfaces. Hence,top and bottom surfaces need to be considered as two distinct channels whose chemical potentialand thus the conductance differ. To evaluate the contributions of the top and bottom surfaces inthe total conductance, a two-band analysis of the magnetic-field dependence in the Hall resistance, R yx ( H ) , from a device such as shown in Fig. 1a, is useful .The independence of top and bottom surface channels mentioned above makes it difficultto attain the unique situation where the chemical potential is tuned exactly at the Dirac point, bygating the TI from either the top or the bottom side alone. To achieve full tuning to the Diracpoint
12, 22, 23 , both sides of the TI need to be gated simultaneously, which is called “dual gating”.Nevertheless, for thicknesses below about 20 nm another route opens up. In this case, the twosurfaces are close enough such that both of them can be tuned reasonably well by gating from justone side . Although it is no problem to growth films thinner than ∼
20 nm by MBE, for flakes, thechallenge lies in optimizing the exfoliation technique to obtain thin-enough flakes with acceptableyield and in identifying them by their different optical properties. Note that, even for films andflakes thinner than ∼
20 nm, the chemical potential may have an offset between top and bottomsurfaces, albeit being simultaneously tunable. 6
Fabricating devices (see Box 1 for clean-room equipment recommendation)Choosing the material
Bulk-insulating BST thin films can be grown with molecular beam epitaxy(MBE) by subtle tuning of flux ratios and growth temperatures . Because the growth proceeds inthe van-der-Waals epitaxy mode , the lattice-constant matching of the substrate is not required forthe epitaxy. While silicon wafers are compatible with well-established industry tools and allowfor epitaxial growth of BST , sapphire (Al O ) wafers tend to give better film qualities . Thesubstrate cleaning is crucial for a successful epitaxy; in the case of sapphire wafers, for exam-ple, a combination of thorough washing, plasma cleaning, and vacuum annealing at 950 ◦ C givessufficiently clean surface.Due to the layered structure and weak van-der-Waals bonds of 3D TIs of the tetradymitefamily, exfoliation of melt-grown bulk crystals of BSTS into thin flakes is another route to obtain-ing high-quality bulk-insulating TIs ready for device fabrication. A major advantage of flakes overthin films is the flexibility in the choice of substrates to exfoliate on. Conducting substrates coatedwith an insulating dielectric, e.g. doped Si coated with SiO , can be used for simple realization ofa gate. Surface protection
To preserve the transport properties of TIs upon device fabrication, somespecial care needs to be taken. First, aging due to surface oxidation can degrade the deviceperformance, through doping and the migration of the surface states deeper in to the sample.The oxidation dynamics depends on the chemical composition of the TI material and its surfacemorphology
25, 26 . For strongly-terraced MBE thin films, surface oxidation is more relevant than for7xfoliated flakes that are almost atomically-flat. Typically, at ambient conditions, sizable oxidationoccurs within minutes to hours, and thus, air exposure of the device under fabrication needs to beminimized. Another, more practical route is to cap films in-situ or right after the growth with min-imal air exposure. As a capping layer for BST, tellurium layer grown in-situ in a MBE chamber,or Al O layer grown in-situ by electron-beam evaporation/sputtering or ex-situ with atomic-layerdeposition (ALD), have proven successful
24, 27, 28 . Depositing a thin layer of aluminum and lettingit oxidize to form AlO x is less suitable, as aluminum alloys with TIs . However, this process canbe useful for capping other metals or superconductors in order to protect those from oxidation. Lithography
Since BST and BSTS are chemically not very stable, for the fabrication of theirdevices, established semiconductor-based fabrication processes need to be reconsidered, startingwith the choice of process chemicals. Solvents like acetone and IPA can be used safely and donot degrade the TI’s properties. However, TMAH-based developers for photo-lithography consid-erably etch TI films on a nm/min scale. Thus, when working with very thin films or flakes, thedevelopment time must be tuned precisely, or preferably electron beam lithography had better beemployed. For thicker films the finite etch rate, in contrast, can be beneficial and reduce the contactresistance via the removal of a native oxide layer during the development. Further, TMAH-baseddevelopers etch Al O at about 10 nm/min (2.38% TMAH) which needs to be taken into accountwhen fabricating a gate electrode with Al O dielectric or when using sapphire substrates. Forcommonly used electron beam resists and developers, no such incompatibility arises.For device fabrications based on exfoliated flakes, it is extremely helpful to use prefabricated8ubstrates of about 10 × size patterned with a closely spaced array of markers for coordina-tion in lithography (see Fig. 1b). The thickness of exfoliated flakes can be judged most efficientlyby optical microscopy based on the shade of the flake in the bright field and the contrast of its edgein the dark field (see Fig. 1a) in the crucial thickness range of 5–30 nm. Electrical contacts
For making electrical contacts it is mandatory to remove any kind of cappinglayer right before metallization. Here, plasma etching, even if performed in-situ , is not a preferredoption, because the etch rate of the tetradymite TIs even at low ion energies is large comparedto the capping materials. Thus, even a slight over-etch of the capping layer can quickly removethe whole TI underneath. Larger selectivity is achieved by wet etching, for example, by usingaluminum etchant (Type D, Transene) for Al O removal. It is essential to avoid etchant residuesby thoroughly washing afterwards. Due to the potentially non-trivial microfluidics of sub- µ mfeatures during the etch, an in-detail analysis and optimization of the capping-layer removal shouldbe performed. Apparently, oxidation occurs again right after removing the capping layer in thecrucial interfacial areas. Therefore, the transfer to the vacuum chamber of the deposition systemeither needs to be performed rapidly or a flow box is used together with a suitable vacuum-tighttransfer box and/or a portable nitrogen bag. Making electrostatic gates
As discussed above, full gate control can only be achieved via dualgating. For thin films this requires transferring the film from the growth substrate to a suitablefabrication substrate, e.g. a doped-Si substrate coated with SiO , via a detaching technique (seeFig. 1c). The film quality of the gate dielectric decides the later device performance in terms of9ysteresis due to trap states, pinning of the chemical potential by localized states, leakage becauseof pinholes, and premature breakdown due to defects. In this sense, oxides grown in a dry processare preferable and typically used for the back gate. For TI devices, the growth of the dielectric layerneeds to be performed without heating the TI material too much, even though a high-quality gatedielectric often requires a high-temperature growth; in this regard, among the suitable materialsand techniques for the fabrication of the top gate are silicon nitride grown by hot-wire CVD ,aluminum oxide grown by ALD , and flakes of h-BN transferred onto TI flakes
23, 31 . The devices to elucidate the emergence of topological superconductivity and associated Majoranabound states (MBS) in hybrid structures of a superconductor (SC) and a TI
32, 33 are one of the mostinteresting classes of TI devices. However, the fabrication of such devices is very challenging dueto the difficulty in preparing the necessarily clean interfaces with high transparency between thetwo materials (see Fig. 2 for exemplary devices). In the following, we describe specific know-howsfor such TI/SC hybrid devices (see Box 2 for characterization tips).Needless to say, oxidation and excessive heating must be avoided to preserve the TI’s prop-erties, but in addition, the TI surface should be free from residual oxides and adsorbates when aSC layer is deposited. Successive in-situ deposition of a SC onto a freshly-grown TI thin film is apossibility , but an epitaxial growth of a SC compatible with post-fabrication of nano-devices hasnot been achieved. In an ex-situ process, interface cleaning can be performed by gentle (reactive)10on etching and dilute acid treatment . In addition, in-situ ion milling at low energies ( (cid:46) eV)can help to prepare pristine surfaces. Yet, the ion energy and milling time should be tuned care-fully, as detrimental effects induced by excessive milling may dominate and affect the mobility ofthe surface carriers of interest. Also, the usefulness of in-situ cleaning needs to be assessed forthe particular TI material and the individual instrument at hand. TI thin films usually has a highdensity of step edges on their surface, such that the microscopics of the ion-beam interaction isdifferent from that on exfoliated flakes having a much flatter surface.Besides physically cleaning the interface, the choice of the proximitizing SC material and/orthe adhesion-layer material is crucial for achieving a high interface transparency (see Table 1 foran overview). Not all common SC materials can be used directly on top of TI materials dueto potential alloying with the TI. For example, among the popular SC materials, aluminum (Al)alloys with BST(S) . Thus, it is often necessary to first coat the TI with an adhesion layer whichalso acts as a diffusion barrier. Platinum and titanium are commonly used as adhesion layers. Theymediate a good electrical contact together with superconducting Al or V, but also with normalmetals such as Au. Typical thickness of the adhesion layer is in the range of about 5 nm, i.e.thick enough to be continuous and protective for the TI, but also thin enough not to hinder thesuperconducting proximity effect to reach the TI. Niobium provides good electrical contact evenwithout any sticking layer and adheres very well. However, the adhesion to the TI can be evenstronger than that of TI films to the substrate, which may lead to odd liftoff results.11 anowires Nanowires of TIs represent the straightforward implementation of the fundamentalconcept to realize MBS . In such nanowires the Dirac surface states acquire a gap and splitinto subbands. With half-integer values of the flux quantum ( n + ) h/e piercing the wire and inproximity to a an s -wave superconductor, a topological 1D superconducting state can be realizedirrespective of the location of the chemical potential . Suitable nanowires can be obtained invarious ways. The vapor-liquid-solid (VLS) growth yields TI nanowires in length of a few µ mof consistent morphology (Fig. 3a) with relatively low instrumentational efforts
8, 36 . Hydrothermalsynthesis or exfoliation of bulk crystals can also result in thin TI nanoribbons, although the yieldin the latter case is extremely low and the regime of one-dimensional transport is achieved for verynarrow ribbons only.The approach of etching a continuous thin film into desired nanowires (or a network ofthem) promises virtually unlimited design freedom and well-controllable properties of the ob-tained nanowires, while requiring highly tuned processes and sophisticated machinery. Nanostruc-tures with carrier mobilities retained from the pristine film can be obtained by a combination ofdry ion etching and wet etching with a 3:1 dilution of H O :H SO (examples in Figs. 3b&1a).The “selective area growth” method (Fig. 3c) of prepatterning a substrate with a growth mask forsubsequent epitaxy allows for complex device designs as well and can additionally be extended toemploy in-situ deposition of superconductors by using suspended growth masks
15, 38 . Interfacingbulk-insulating TI nanowires with superconductors is an important immediate challenge.12
Interfacing TIs with ferromagnets
Ferromagnets in contact with the TI surface offer two types of functionalities. One is to breaktime reversal symmetry in the TI surface states through “magnetic proximity effect” and to openup a magnetic exchange gap at the Dirac point. The other is spintronic functionalities, either todetect the spin polarization on the TI surface or even to present magnetization switching due thespin-orbit torque exerted from the TI. Insulating ferromagnets are used for the magnetic proximityeffect, while metallic ferromagnets are used for spintronic devices.For the magnetic proximity effect, the ferromagnetic insulator EuS grown on Bi Se hasbeen used for devices to detect chiral currents at magnetic domain boundaries or to induce fer-romagnetism in the TI surface at room temperature . Also, magnetic proximity effect is a cleanerway to induce ferromagnetism in the TI surface states than magnetic doping to maintain a highcarrier mobility, and the quantum anomalous Hall effect has recently been achieved by interfacingthe ferromagnetic insulator Zn − x Cr x Te to BST . For efficient magnetic proximity effects, usingthe MBE technique to realize epitaxial interface is crucial
40, 41 .In spintronic devices based on TIs, ferromagnetic metals have been used as a spin-voltagedetector to probe the current-induced spin polarization in the spin-momentum locked surfacestates
16, 17 . Thermally-evapolated Permalloy is commonly used for this purpose. For the spin-voltage detection, non-Ohmic, high resistance contact is preferred to compensate for the impedancemismatch at the interface, and a tunnel barrier is typically inserted in between the TI and the fer-romagnet to enhance the spin voltage. In terms of fabrication, deposition of the tunnel barrier13aterial (typically Al O or MgO) requires special care, such as preparing a pristine TI surface,avoiding pinholes, and achieving reproducible thickness control in order to tune the contact resis-tance, which depends exponentially on the tunnel barrier thickness.The current-induced spin polarization can be used for switching the magnetization of a fer-romagnetic metal in direct contact with the TI surface. Such devices use spin-orbit torque, whichrequires a good metallic contact. The first demonstration of the switching operation was performedin a epitaxially-grown bilayer of BST and ferromagnetic Cr-doped BST . A very efficient spin-orbit torque switching has been reported for a device based on Bi . Sb . and MnGa. For devices to exploit the peculiar surface-state properties of TIs, usage of bulk-insulating materialssuch as MBE-grown BST thin films or exfoliated BSTS flakes are recommended. To preservethe surface-state mobility as well as the bulk-insulating nature, too much heating and dry etchingshould be avoided, and usages of capping layer and wet etching are recommended. For electrostaticgating to control the chemical potential, one should keep in mind that top and bottom surfacesform independent conduction channels, and dual gating is recommended for a full control of thechemical potential.The technologies to realize clean interfaces between TIs and other materials are not suffi-ciently developed.
In-situ epitaxial growth of superconductors and ferromagnetic insulators aredesirable for better superconducting- and magnetic-proximity effects. In this respect, more efforts14ad better be focused on the realization of epitaxial interfaces for superconducting and QAHI de-vices. Furthermore, epitaxially-grown heterostructure of a TI and a ferromagnetic insulator canbe a platform to realize new topological states of matter , so the combination of heterostructuregrowth and device fabrication will have a particularly bright prospect. Acknowledgements:
We thank J. Feng, M. R¨ossler, D. Fan, L. Dang, F. M¨unning, G. Lippertzand A. Taskin for providing device pictures, and D. Gr¨utzmacher, P. Sch¨uffelgen, and F. Yang foruseful discussions. This work has received funding from the European Research Council (ERC)under the European Union’s Horizon 2020 research and innovation programme (grant agreementNo 741121) and was also funded by the Deutsche Forschungsgemeinschaft (DFG, GermanResearch Foundation) under CRC 1238 - 277146847 (Subprojects B01) and AN 1004/4-1 -398945897, as well as under Germany’s Excellence Strategy - Cluster of Excellence Matter andLight for Quantum Computing (ML4Q) EXC 2004/1 - 390534769.
Author contributions:
Y.A. conceived the article with input from O.B. O.B. and Y.A. wrote themanuscript.
Competing Interests:
The authors declare no competing interests. • clean room infrastructure: To date, TI devices are typically fabricated in small batchesas prototypes, such that the functional device parts cover only a few µ m on the substrates.15hus, the requirements on the clean room class are fairly low. Nevertheless, yellow lightningis required to enable optical lithography processes. A wet bench or fume hood is neededfor working safely with solvents, developers, and acids. For high-resolution lithography,vibration-isolation and/or reinforced floor plates may be required for the installation of anelectron-beam writer. The room temperature needs to be stable within a few ◦ C as somedevelopment and etching processes strongly depend on temperature.• lithography: optical lithography (with mask aligner or maskless laser writer) for prepattern-ing wafers with markers and pads; electron-beam lithography with good overlay accuracy,which requires laser interferometry stage.• analysis: scanning electron microscope; atomic force microscope; high-grade optical mi-croscope (laser confocal microscope) with dark-field option, camera, and yellow-light filter.• deposition (necessary machines depend on the choice of metals and superconductors): UHVsputtering system with in-situ low-energy ( < eV) ion gun; electron-beam evaporator;thermal evaporator; atomic layer deposition (ALD) machine.• etching: reactive ion etching (RIE) machine for dry etching and interface cleaning; hot platewith magnetic stirrer and water bath for wet etching. The success of interfacing the TI with superconductors needs to be judged from the device char-acteristics, mostly by performing transport experiments in a dilution fridge. The contact resistance16an be a rough indication of the interface cleanliness. Typical contact resistivities of well-preparedcontacts are of the order of 100 Ω µ m and should hardly depend on temperature. In-depth infor-mation can be gained from Josephson junctions, where two superconducting electrodes are placedon top of the TI with a small gap in between them, such that a SNS junction is formed throughthe TI in a planar geometry. When the TI material is bulk-insulating, the gap between the elec-trodes should be narrower than ∼
80 nm. The width of the superconducting leads should be keptsmall enough (shorter than the London penetration depth) such that Abrikosov vortices will notpenetrate. Abrikosov vortices formed near the junction would alter the effective flux through thejunction area and thus make it difficult to observe the Fraunhofer pattern in the magnetic-field de-pendence of the critical current I c , which gives insight into the homogeneity of the SC/TI interfaceand serve as a proof of proximity-induced superconductivity .In addition to the Fraunhofer-pattern measurement, the I-V characteristics (Fig. 4) of thejunction should be measured to perform the following analyses:(i) Comparison of the I c R n product to the superconductor’s bulk gap ∆ SC = 1 . k B T c (ii) Estimation of the induced superconducting gap ∆ ind by indexing the multiple Andreev reflec-tions observed at V n = 2∆ ind /en in the resistive state
45, 46 , and compare it with ∆ SC (iii) Estimation of the transparency
45, 47 of the SC/TI interface from ∆ ind , excess current I e , and thenormal-state resistance R n (iv) Extraction of the transparency between the proximitized TI underneath the SC electrodes andthe pristine TI part in the junction gap from the temperature dependence of the critical current
15, 48 π -periodic relation of the current acrossthe junction to the phase difference across it . It is reflected in the missing of Shapiro steps V = nhf / e with odd index n upon irradiating the junction by a microwave of frequency f , asobserved in a few experiments
10, 50, 51 , or in the appearance of the microwave radiation with halfthe Josephson frequency, f J [= (2 eV dc /h )] , from the junction . References:
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Nat. Commun. , 159 (2020).24 l O T o p G a t e P t / A u TI
100 µm ba c
10 µm Al O TI filmPMMASi ++ SiO TI film KOHwater S i ++ S i O Acetonewashdark field
Figure 1:
Fabrication of TI devices. a , Top-gated Hall bar device fabricated from a MBE-grownthin film. The dashed line indicates the edge of the etched Hall bar structure underneath the gatemetal. b , Optical contrast of thin exfoliated flakes. The flake marked by a red arrow and shown in amagnified view (box framed red) is less than 20 nm thick and thus appears half-transparent. On itsleft edge the thickness is larger, indicated by a more bright color. In dark-field microscopy (inset)the edge of thin flakes is less apparent than that of thicker flakes. A dense array of prefabricatedmarkers (corners of the image) is useful for precise alignment. c , Process of transferring a TI filmfrom an Al O growth substrate to a Si/SiO substrate for dual-gating, following Ref. 22.25 µm Nb Etched TIAl O ba
20 µm
10 µm
Al/AlO x /AljunctionNb/TI/NbjunctionTI flake flux bias line S Q U I D l o o p Figure 2:
TI-based Josephson junction devices. a , False-color confocal laser micrograph of anasymmetric SQUID-device for investigating the current-phase-relation of a SC/TI/SC Josephsonjunction. The SQUID loop is formed by an Al/AlO x /Al reference junction (blue) in parallel to aTI junction made from two close Nb leads (light red). A flux bias line (brown) is used to alterthe flux through the loop. Auxiliary test junctions (yellow) are fabricated on top of the exfoliatedflakes (green) in order to characterize the stand-alone SC/TI/SC junction. b , TI nanowire Joseph-son junction device fabricated by etching a MBE-grown thin film into a nanowire shape (opticalimage). The inset shows a close-up false-color scanning electron micrograph of the nanowire (blueshade) with differently spaced Nb leads (gold) on top.26 b c
10 µm1 µm
500 nm
Figure 3:
Topological insulator nanowire devices. a , False-color scanning electron micrographof a device based on VLS-grown nanowire (colored light blue) for normal state transport measure-ments using electrodes (brown) made from 5 nm Pt + 40 nm Au. b , BST thin film (gray) etchedinto the shape of a nanowire. Contacts are either realized based on etched leads (5 left contacts &right-most contact) or by subsequent fabrication of Pt/Au finger contacts. c , nanowire device madeby selective area growth. A BST film grows within the prepatterned trenches only (white areas ofthe main image). Multiple leads, but also gates (green areas in the false-color scanning electronmicrograph shown in the inset), can be realized from BST in the same run.27 II c I e ~2 Δ M A R dV/dI=R n Figure 4:
Schematics of the IV -curve of a SC/TI/SC Josephson junction. For currents largerthan the critical current I c , the measured IV-curve (red line) may contain signatures of multipleAndreev reflections (MAR) up to a voltage of , where ∆ is the induced superconducting gap.For voltages V > a linear regime is entered, characterized by the normal state resistance R n .Extrapolating this linear dependence yields the excess current I e as the current-axis intercept. SC material adhesion layer deposition method comment niobium (Nb) – UHV sputtering great adhesion, high T c – HV sputtering of Pd self-formed upon deposition 54tungsten (W) – FIB difficult to deposit55, 56lead (Pb) – thermal evaporation unpopular material for microfabrication57, 58, topologicalproximity effect 59 Table 1:
Proximitizing superconductors.