Interstrip Capacitances of the Readout Board used in Large Triple-GEM Detectors for the CMS Muon Upgrade
M. Abbas, M. Abbrescia, H. Abdalla, A. Abdelalim, S. AbuZeid, A. Agapitos, A. Ahmad, A. Ahmed, W. Ahmed, C. Aimè, C. Aruta, I. Asghar, P. Aspell, C. Avila, J. Babbar, Y. Ban, R. Band, S. Bansal, L. Benussi, V. Bhatnagar, M. Bianco, S. Bianco, K. Black, L. Borgonovi, O. Bouhali, A. Braghieri, S. Braibant, S. Butalla, S. Calzaferri, M. Caponero, F. Cassese, N. Cavallo, S. Chauhan, A. Colaleo, J. Collins, A. Conde Garcia, M. Dalchenko, A. De Iorio, G. De Lentdecker, D. Dell Olio, G. De Robertis, W. Dharmaratna, S. Dildick, B. Dorney, R. Erbacher, F. Fabozzi, F. Fallavollita, A. Ferraro, D. Fiorina, E. Fontanesi, M. Franco, C. Galloni, P. Giacomelli, S. Gigli, J. Gilmore, M. Gola, M. Gruchala, A. Gutierrez, R. Hadjiiska, T. Hakkarainen, J. Hauser, K. Hoepfner, M. Hohlmann, H. Hoorani, T. Huang, P. Iaydjiev, A. Irshad, A. Iorio, F. Ivone, J. Jaramillo, D. Jeong, V. Jha, A. Juodagalvis, E. Juska, B. Kailasapathy, T. Kamon, P. Karchin, A. Kaur, H. Kaur, H. Keller, H. Kim, J. Kim, A. Kumar, S. Kumar, H. Kumawat, N. Lacalamita, J.S.H. Lee, A. Levin, Q. Li, F. Licciulli, L. Lista, K. Liyanage, F. Loddo, M. Lohan, M. Luhach, M. Maggi, Y. Maghrbi, N. Majumdar, K. Malagalage, S. Malhotra, et al. (81 additional authors not shown)
TThis work has been submitted to JINST for publication. Copyright may be transferred withoutnotice, after which this version may no longer be available.
Interstrip Capacitances of the Readout Board used inLarge Triple-GEM Detectors for the CMS Muon Upgrade
M. Abbas, n M. Abbrescia, t H. Abdalla, h , j A. Abdelalim, h , k S. AbuZeid, h , i A. Agapitos, d A. Ahmad, ae A. Ahmed, q W. Ahmed, ae C. Aimè, y C. Aruta, t I. Asghar, ae P. Aspell, aj C. Avila, f J. Babbar, p Y. Ban, d R. Band, al S. Bansal, p L. Benussi, v V. Bhatnagar, p M. Bianco, aj S. Bianco, v K. Black, ao L. Borgonovi, u O. Bouhali, a f
A. Braghieri, y S. Braibant, u S. Butalla, ap , S. Calzaferri, y M. Caponero, v F. Cassese, x N. Cavallo, x S. Chauhan, p A. Colaleo, t J. Collins, ap A. Conde Garcia, aj M. Dalchenko, ak A. De Iorio, x G. De Lentdecker, a D. Dell Olio, t G. De Robertis, t W. Dharmaratna, ai S. Dildick, ak B. Dorney, a R. Erbacher, al F. Fabozzi, x F. Fallavollita, aj A. Ferraro, y D. Fiorina, y E. Fontanesi, u M. Franco, t C. Galloni, ao P. Giacomelli, u S. Gigli, y J. Gilmore, ak M. Gola, q M. Gruchala, aj A. Gutierrez, am R. Hadjiiska, c T. Hakkarainen, l J. Hauser, an K. Hoepfner, m M. Hohlmann, ap H. Hoorani, ae T. Huang, ak P. Iaydjiev, c A. Irshad, a A. Iorio, x F. Ivone, m J. Jaramillo, g D. Jeong, ab V. Jha, s A. Juodagalvis, ad E. Juska, ak B. Kailasapathy, ag , ah T. Kamon, ak P. Karchin, am A. Kaur, p H. Kaur, p H. Keller, m H. Kim, ak J. Kim, aa A. Kumar, q S. Kumar, p H. Kumawat, s N. Lacalamita, t J.S.H. Lee, ab A. Levin, d Q. Li, d F. Licciulli, t L. Lista, x K. Liyanage, ai F. Loddo, t M. Lohan, p M. Luhach, p M. Maggi, t Y. Maghrbi, ac N. Majumdar, r K. Malagalage, ag S. Malhotra, a f , S. Martiradonna, t N. Mccoll, an C. McLean, al J. Merlin, t M. Misheva, c D. Mishra, s G. Mocellin, m L. Moureaux, a A. Muhammad, ae S. Muhammad, ae S. Mukhopadhyay, r M. Naimuddin, q P. Netrakanti, s S. Nuzzo, t R. Oliveira, aj L. Pant, s P. Paolucci, x I.C. Park, ab L. Passamonti, v G. Passeggio, x A. Peck, an N. Perera, ai L. Petre, a H. Petrow, l D. Piccolo, v D. Pierluigi, v G. Raffone, v M. Rahmani, ap F. Ramirez, g A. Ranieri, t G. Rashevski, c M. Ressegotti, y , C. Riccardi, y M. Rodozov, c E. Romano, y C. Roskas, b B. Rossi, x P. Rout, r D. Roy, ap J. D. Ruiz, g A. Russo, v A. Safonov, ak D. Saltzberg, an G. Saviano, v A. Shah, q A. Sharma, aj R. Sharma, q M. Shopova, c F. Simone, t J. Singh, p E. Soldani, t U. Sonnadara, ag E. Starling, a B. Stone, an J. Sturdy, am G. Sultanov, c Z. Szillasi, o D. Teague, ao D. Teyssier, o T. Tuuva, l M. Tytgat, b I. Vai w N. Vanegas, g R. Venditti, t P. Verwilligen, t W. Vetens, ao A. Virdi, p P. Vitulo, y A. Wajid, ae D. Wang, d K. Wang, d I.J. Watson, ab J. Weatherwax, ap N. Wickramage, ai D.D.C. Wickramarathna, ag Y. Yang, a U. Yang, aa J. Yongho, z I. Yoon, aa Z. You, e I. Yu z and S. Zaleski m on behalf of the CMS Muon Group a Université Libre de Bruxelles, Bruxelles, Belgium b Ghent University, Ghent, Belgium Corresponding authors. Now at INFN Sezione di Genova, Genova, Italy a r X i v : . [ phy s i c s . i n s - d e t ] S e p Institute for Nuclear Research and Nuclear Energy, Sofia, Bulgaria d Peking University, Beijing, China e Sun Yat-Sen University, Guangzhou, China f University de Los Andes, Bogota, Colombia g Universidad de Antioquia, Medellin, Colombia h Academy of Scientific Research and Technology - ENHEP, Cairo, Egypt i Ain Shams University, Cairo, Egypt j Cairo University, Cairo, Egypt k Helwan University, also at Zewail City of Science and Technology, Cairo, Egypt l Lappeenranta University of Technology, Lappeenranta, Finland m RWTH Aachen University, III. Physikalisches Institut A, Aachen, Germany n Karlsruhe Institute of Technology, Karlsruhe, Germany o Institute for Nuclear Research ATOMKI, Debrecen, Hungary p Panjab University, Chandigarh, India q Delhi University, Delhi, India r Saha Institute of Nuclear Physics, Kolkata, India s Bhabha Atomic Research Centre, Mumbai, India t Politecnico di Bari, Università di Bari and INFN Sezione di Bari, Bari, Italy u Università di Bologna and INFN Sezione di Bologna, Bologna, Italy v Laboratori Nazionali di Frascati INFN, Frascati, Italy x Università di Napoli and INFN Sezione di Napoli, Napoli, Italy y Università di Pavia and INFN Sezione di Pavia, Pavia, Italy w Università di Bergamo and INFN Sezione di Pavia, Pavia, Italy z Korea University, Seoul, Korea aa Seoul National University, Seoul, Korea ab University of Seoul, Seoul, Korea ac College of Engineering and Technology, American University of the Middle East, Dasman, Kuwait ad Vilnius University, Vilnius, Lithuania ae National Center for Physics, Islamabad, Pakistan af Texas A & M University at Qatar, Doha, Qatar ag University of Colombo, Colombo, Sri Lanka ah Trincomalee Campus, Eastern University, Sri Lanka, Nilaveli, Sri Lanka ai University of Ruhuna, Matara, Sri Lanka aj CERN, Geneva, Switzerland ak Texas A & M University, College Station, USA al University of California, Davis, Davis, USA am Wayne State University, Detroit, USA an University of California, Los Angeles, USA ao University of Wisconsin, Madison, USA ap Florida Institute of Technology, Melbourne, USA
E-mail: [email protected] , [email protected] bstract: We present analytical calculations, Finite Element Analysis modeling, and physicalmeasurements of the interstrip capacitances for different potential strip geometries and dimensionsof the readout boards for the GE2/1 triple-Gas Electron Multiplier detector in the CMS muon systemupgrade. The main goal of the study is to find configurations that minimize the interstrip capacitancesand consequently maximize the signal-to-noise ratio for the detector. We find agreement at the 1.5–4.8% level between the two methods of calculations and on the average at the 17% level betweencalculations and measurements. A configuration with halved strip lengths and doubled strip widthsresults in a measured 27–29% reduction over the original configuration while leaving the totalnumber of strips unchanged. We have now adopted this design modification for all eight moduletypes of the GE2/1 detector and will produce the final detector with this new strip design.Keywords: Detector modeling and simulations II; Micropattern gaseous detectors ontents The Large Hadron Collider (LHC) was built to shed light on several fundamental questions inparticle physics. The Compact Muon Solenoid (CMS) experiment [1] is one of the LHC’s twogeneral purpose experiments designed and built to detect and reconstruct particles produced inproton-proton (pp) and heavy ion (proton-ion and ion-ion) collisions. With the discovery of theHiggs boson [2, 3], the CMS Collaboration has established a rigorous research program involvingprecise measurements of Higgs boson properties and searches for new physics. This requires alarge increase in the LHC luminosity, which puts stringent requirements on the detectors. In orderto maintain its excellent performance, the CMS experiment is currently undergoing a series ofupgrades of its components, including its muon system [4, 5]. The upgrade of the muon system is acritical component of CMS due to the strong role of exploring new physics with muons in the finalstate.The CMS muon system is composed of three detector technologies: Resistive Plate Chambers(RPC), Drift Tubes (DT) and Cathode Strip Chambers (CSC), all of which are being upgraded[5]. To ensure continued function of the muon trigger at acceptably low Level-1 trigger rates andto increase redundancy and acceptance of the muon system, a new muon subdetector based onGas Electron Multipliers (GEMs) [6] is being added in the forward region of the CMS detector(see figure 1) [5, 7]. For this upgrade, triple-GEM detectors, i.e. micro-pattern gas detectors withthree GEM foils, are being used. Figure 2 shows a schematic cross section of the geometricalconfiguration of drift anode, foils, and readout board for all CMS triple-GEM detectors.– 1 – z (m) R ( m ) θ ° η θ ° η M E / M E / M E / M E / M E / M E / M E / M E / R E / R E / R E / MB1MB2MB3MB4Wheel 0 Wheel 1 RB1RB2RB3RB4Solenoid magnetSilicon tracker SteelWheel 2 R E / R E / M E / R E / R E / R E / CSCsRPCsDTs R E / G E / G E / GEMs R E / iRPCs R E / ME0 M E HGCALECALHCAL
Figure 1 . An R-z cross section of a quadrant of the upgraded CMS detector high-lighting the locationsof the new GE1/1, GE2/1, and ME0 stations with GEM technology in the CMS muon endcap region. Thepreviously existing muon stations, i.e. drift tubes (MB), cathode strip chambers (ME), and resistive platechambers (RB, RE), and the flux-return steel yoke (dark areas) are also shown.
Figure 2 . Cross-sectional view of a CMS triple-GEM detector consisting of three GEM foils. – 2 –ne of the challenges with any detector system is improving the signal-to-noise ratio (S/N).One variable that influences the noise in the detector is the capacitance between readout strips onthe readout board (ROB), that we refer to as the “interstrip capacitance”. As the S/N is influencedby the geometrical configuration and the dimensions of the readout strips, i.e. the length and widthof the strips, as well as their spacing, the interstrip capacitance is crucial for detector operation andperformance. The purpose of this study is to optimize the final readout strip geometry of the GEMdetectors in the GE2/1 station (see figure 1) to maximize the S/N.Specifically, we are addressing the concern that the strips are quite long in the original designof the largest GE2/1 modules. This leads to significant capacitances presented to the inputs of thefront-end electronics and a danger of unacceptable noise levels. We consider modifying the originaldesign [5] by cutting the strips in half and doubling their widths while keeping the gap betweenstrips the same. This obviously preserves the area of each strip and consequently the total numberof strips per module. The key question then is by how much exactly this changes the interstripcapacitance. This motivates the studies presented here.We discuss results from three methods used to determine the interstrip capacitance: analyticalcalculation, two- and three-dimensional (2D and 3D, respectively) simulations using Finite ElementAnalysis (FEA), and experimental measurements on a custom ROB with different strip geometries.This paper is organized as follows: In section 2, we briefly describe the overall geometry of theGE2/1 chambers and of the readout strips on the readout boards. Section 3 provides informationon the calculation and modeling of the interstrip capacitance of the GE2/1 strips. In section 4, wedescribe the setup used for experimental measurements of the interstrip capacitances. Results arepresented and discussed in section 5.
The GE2/1 muon station will cover the pseudo-rapidity region 1 . < | η | < .
4. This stationconsists of large trapezoidal chambers as shown in figure 3. A GE2/1 chamber comprises fourseparate modules and covers an area of 1.45 m . Chambers are installed in pairs on the muonstation to provide two positional measurements per muon track. The GE2/1 station will comprise72 chambers, each covering 20.3 ◦ in the azimuthal direction, with 36 chambers per muon endcap.The back chamber contains four modules labeled M1 (smallest) to M4 (largest), and the frontchamber comprises corresponding modules M5 (smallest) to M8 (largest). In total, 864 large GEMfoils are needed for this system. In this study, the smallest and largest modules of a GE2/1 chamber,i.e. the M1 and M4 modules, are considered; their original strip specifications are summarized intable 1 [5]. – 3 –
178 mm971 mm782 mm644 mm502 mm
M4M3M2M1 mm mm mm mm Figure 3 . Left: The dimensions of the modules in the back chamber of the GE2/1 superchamber. Right: Afully instrumented GE2/1 prototype chamber.
Table 1 . Original specifications of readout strips used in M1 and M4 modules.
Module Strip length (cm) Strip width (cm) Interstrip gap (cm)M1 19.6 0.0478 0.02M4 20.6 0.124 0.02Figure 4 (top) shows a picture of the readout strips of the readout board of an M5 module as anexample. The bottom of the same figure shows a zoomed image of the readout strips. Note thereadout strip segmentation between readout sectors, as well as the diagonal pattern of vias thatconnect the strips to connecting traces on the back of the printed circuit board (PCB).– 4 – igure 4 . Top: The readout strips on the ROB of a prototype module of the GE2/1 GEM detector. Bottom:A zoomed image of readout strips in the same ROB. Note the vias running in diagonal patterns near thecenter.
Figure 5 displays a cross section of a subsection of the GE2/1 ROB used for the analytical calcu-lations. Here, “Strip” refers to the readout strips on the ROB and “Trace” refers to the signal lines– 5 –n the other side of the ROB which are connected to the readout strips through a via, which isan electrically conductive channel that runs through the PCB. These signal traces terminate in thereadout connectors, where the front-end electronics are plugged in so that a signal can be read out.
Figure 5 . The readout strip and trace geometry, where w is the strip width, 2 g is the gap width of the strips, w t is the trace width, 2 g t is the gap width of the traces, and h is the thickness of the substrate with dielectricconstant (cid:15) . Note that strips and traces are connected by vias (not shown), which are conductive connectionsthat run between the layers of the PCB. The capacitance between coplanar metal strips on a dielectric surface has been widely investigatedand used in particular in the fields of telecommunication and microwave applications [8, 9]. Inthis work, the interstrip capacitance per centimeter of strip length is calculated using a modifiedversion of the expression developed in [8]. This equation is modified to account for readout stripson the front of the board and for the traces on the back side of the ROB. Using the dimensionsdisplayed in figure 5, we obtain the following equations, which are a linear sum of the strip andtrace capacitances: ( C / l ) = ( C sa + C a ) l − s + ( C st + C t ) l − t (3.1) = (cid:15) (cid:32) ( (cid:15) − ) K ( k (cid:48) ) K ( k ) + K ( k (cid:48) ) K ( k ) (cid:33) + (cid:15) (cid:32) ( (cid:15) − ) K ( k (cid:48) t ) K ( k t ) + K ( k (cid:48) t ) K ( k t ) (cid:33) – 6 –here: k = tanh (cid:16) π g h (cid:17) coth (cid:18) π ( w + g ) h (cid:19) (3.2) k (cid:48) = (cid:112) ( − k ) (3.3) k = gw + g (3.4) k (cid:48) = (cid:113) ( − k ) (3.5) k t = tanh (cid:16) π g t h (cid:17) coth (cid:18) π ( w t + g t ) h (cid:19) (3.6) k (cid:48) t = (cid:113) ( − k t ) (3.7) k t = g t w t + g t (3.8) k (cid:48) t = (cid:113) ( − k t ) (3.9)Here, C a is the capacitance between two readout strips of length l s with air above and below, C sa is the capacitance between the readout strips due to the presence of the PCB substrate below, C t is the interstrip capacitance between two traces of length l t with air above and below, and C st isthe capacitance between the traces due to the presence of the substrate. Equations 3.2-3.9 are themoduli of K ( k ) , which is the complete elliptic integral of the first kind, where w is the strip width, w t is the trace width, 2 g is the gap between the readout strips, 2 g t is the gap between the traces, h isthe thickness of the FR4 (flame retardant glass-reinforced epoxy laminate) substrate with dielectricconstant (cid:15) = .
7, and (cid:15) is the vacuum permittivity.The average trace lengths, trace widths, and gap widths used for this calculation are measuredexperimentally as explained in section 4. The calculations are performed using MATLAB [10], andthe built-in
MATLAB function ellipke() is used for the complete elliptic integral of the firstkind.
A model of the GEM readout board based on the FEA is created using
COMSOL , a Multiphysicssimulation software [11]. The initial model uses simply two strips with the strip width and thewidth of the gap between the two strips as parameters. This results in a basic 2D model, as shownin figure 6 (left). To find the interstrip capacitance, a potential difference of 1 V is applied betweenthe two strips and then the COMSOL software calculates the charges q using Gauss’s Law and thecapacitance C = qV . Specifically, the FEA model always considers one strip at 1 V and the otherone at 0 V. The model utilizes the Electrostatic Physics module and extra fine meshing is done forall the components as shown in figure 6 (right).The analytical method is limited to two strips and 2D calculations. In order to get more detailedinsight into the interstrip capacitance, we also perform 3D modeling using the COMSOL software,i.e. including the finite length of the readout strips and the 3D geometry. Figure 7 shows 3D modelsfor three strips and for 128 strips. The latter can be utilized to calculate the interstrip capacitancebetween any strips, i.e. not limited to only adjacent strips. The 3D model with two strips can also be– 7 – igure 6 . Left: The electric potential V in the vicinity of two readout strips with a strip gap of 0.4 mmcalculated with the 2D FEA model. A potential difference of 1 V is applied between the strips and theinterstrip capacitance is found to be 0.445 pF/cm. Right: The structure of the mesh obtained in the stripsalong with the air volume on the top and substrate volume at the bottom of the strips. extended to take into account the traces along with the vias that connect them to the readout strips,as shown in figure 8 (left). Here, the vias are connected from the center of the traces to the center ofthe strips. Figure 8 (right) shows the resulting potential in cross-sectional view at the strip center.
Figure 7 . Left: 3D model showing different electric potential between three strips. Right: 3D modelshowing different electric potential between 128 strips. (Note: Substrate is present below the strips in bothcases but for clarity it is omitted in the images shown above.)
The models for the M1 and M4 modules of the GE2/1 chamber are also built using the
COMSOL software. Since these are multi-strip models, it is not feasible to manually create the whole model.Instead, the
COMSOL software is interfaced with
MATLAB programming code to generate a modelwith the full complement of 384 strips. In this model, we also accommodate the gas volume inaddition to the copper strips and the FR4 substrate. This model can also accommodate a coppersheet 1 mm above the ROB to simulate the presence of the GEM3 foil above the ROB (see figure 2),– 8 – igure 8 . Left: The 3D model with two readout strips at the bottom connected by vias to traces at the top.Right: The resulting electric potential map after applying a 1 V potential difference between the two traces.(Note: For clarity, the left image does not show the presence of the substrate and the air volume even thoughthey are taken into account in the calculation of the shown potential). consistent with the hardware configuration (see figure 11). Using this software, we can designatethe strips between which we wish to calculate the interstrip capacitance. This allows us to obtainthe electric potential across the entire module and to calculate the interstrip capacitance betweenvarious combinations of the strips. For example, figure 9 shows the electric potential across the M1module with the value of the interstrip capacitance between first and 384 th strip determined to be0.00838 pF/cm (left) and 0.0154 pF/cm between the first and the 192 nd strip (right). Figure 9 . Left: Electric potential across the bottom half of the M1 module for calculating the interstripcapacitance between first and 384 th strip. Right: Electric potential across the bottom half of the M1 modulefor calculating the interstrip capacitance between first and 192 nd strip. A fixed potential of 1 V (red) is appliedto the first strip and a fixed potential of 0 V (blue) is applied to the other strip of interest. The capacitancebetween those two strips is then calculated with the potential of all other strips varying accordingly. – 9 – Experimental measurements
In order to conduct a comprehensive analysis of the problem, a custom ROB is fabricated that allowsdirect physical capacitance measurement. It has the overall shape of a GE1/1 ROB with twelvedifferent strip configurations proposed for the M1 and M4 GE2/1 modules. These configurationexplore different options for strip and trace lengths, as well as for strip and gap widths. To determinethe geometry of the traces on the other side of the board, their length, width, and gap width aremeasured twelve times at each end of the traces. Because the gap width between the traces is notconstant along their lengths, the average between the smallest and largest gap widths is used in thecalculation. Table 2 lists the specific configurations of the readout strips and the measured signaltrace dimensions in each of the 12 sectors of the custom-built ROB, including the parameters fromthe designs in the original Technical Design Report (TDR) [5].
Figure 10 . Layout of the GE2/1 custom ROB. Left: Readout strips on the board on which interstripcapacitances are measured. Right: Signal trace routing on the back side of the ROB and the position of thereadout connectors. The specific strip geometries in each of the 12 sectors are listed in table 2.
The interstrip capacitance is measured in each readout sector with a commercial ExcelvanM6013 capacitance meter. For each pair of strips, four measurements are made. To obtain anaccurate measurement, the probes of the capacitance meter are placed at opposite ends of adjacent– 10 – able 2 . Trace dimensions for the ROB shown in figure 10 (right).
Sector Module Parameters Avg. meas. Avg. meas. Avg. meas.length width Gap width(cm) (mm) (mm)1 M4 Original TDR design (Strip Gap: 0.2 mm) 8.490 ± ± ± ± ± ± × Width, 0.5 × Length 10.93 ± ± ± ± ± ± ± ± ± ± ± ± ± ± ± × Width, 0.5 × Length 6.209 ± ± ± × Length 1.990 ± ± ± ± ± ± ± ± ± × Width, 0.5 × Length 3.806 ± ± ± strip pairs, and held about a centimeter above the strips by one person while the meter is zeroedby another person. After zeroing, the probes are immediately placed on the strip and a reading istaken. A weighted mean over all strips in each sector is calculated from the average of all trials foreach individual strip, and the standard deviation of the weighted mean is computed for all sectors.The measurements are repeated with a copper-covered PCB suspended 1 mm from the readoutboard in order to simulate the capacitance contribution of the bottom of the GEM3 foil above it (seefigure 11). One-millimeter dielectric FR4 spacers are placed around the edge of the ROB to holdthe copper-clad PCB 1 mm from the ROB. Extra spacers are also used in areas where there are noreadout strips to ensure that the ROB remains planar. Because the readout strips are not directlyaccessible in this configuration, the probes of the capacitance meter are instead placed on the pinsof the 128-channel Panasonic connector on the ROB. The same procedure of zeroing the meter andreading the measurements is followed as described above. The measurements are taken with thesame statistics and in the same locations for both strips and traces (except for sector 1 where threeadditional measurements are taken). The calculated and measured interstrip capacitances for the readout board of GE2/1 detectors arepresented for various configurations of strip dimensions. We wish to compare the results from thetwo calculation methods to each other and then the calculations to the measurements. For the latter,the trace dimensions in the analytical calculation and in the FEA modeling with 2 strips and 2 tracesare varied to reproduce the different trace lengths on the physical ROB (see table 2).
Figure 12 compares the results obtained from varying the strip width and the gap width between thestrips for the M1 and M4 modules. These results are based on the 2D model for both the analytical– 11 – igure 11 . Picture of a cross-section of the experimental configuration for the simulation of the capacitancecontribution of the bottom of the third GEM foil. The readout board is suspended 1 mm above a copper-covered PCB with 1 mm FR4 spacers. calculations and the FEA model. The four different strip widths considered here correspond to theoriginal TDR strip width (see table 1) and a doubled strip width for the M1 and M4 modules. Fora strip gap of 0.02 cm, the discrepancies between the analytical calculation and the FEA model are1.5-4.5%, and for a strip gap of 0.04 cm they are 1.8-4.8%. For both strip gap configurations, theminimum error corresponds to the M4 module with double strip width and the maximum error isfor the M1 module with double strip width.Results from both methods agree quite well in all cases. As expected, interstrip capacitancesincrease when the strip width is doubled for both M1 and M4 modules. However, the increase isonly on the order of 10-20%. Since interstrip capacitance is directly proportional to strip length,halving the strip length will decrease the capacitance by 50%. Consequently, halving the striplength while doubling the strip width does indeed lead to an overall reduction of the interstripcapacitance, which is now quantified to be 40-45%. This result confirms the original premise forthis study quantitatively. A decrease on the order of 20% in the interstrip capacitance is seen in thecalculations when the gap width between the strips is doubled.
For the experimental measurements of the interstrip capacitance, the values listed in table 3 areweighted means over all measured strip pairs in the sector, and the uncertainties are the standarddeviations of the weighted means. The table also lists the ratios of the measured capacitances tothe analytically calculated capacitances.The configuration with the lowest measured interstrip capacitance (9.32 ± trip width (cm)0.05 0.1 0.15 0.2 0.25 I n t e r s t r i p c apa c i t an c e pe r l eng t h ( p F / c m ) Analytical calculation, strip gap = 0.02 cmFEA model, strip gap = 0.02 cmAnalytical calculation, strip gap = 0.04 cmFEA model, strip gap = 0.04 cm
Figure 12 . Comparison between analytical calculation and 2D FEA modeling of interstrip capacitances perlength for original TDR strip width and doubled strip width in the M1 and M4 modules.
Table 3 . Measured and calculated interstrip capacitances for open GE2/1 ROB.
Sector Module Parameters Calc. cap. Avg. meas. cap. Meas. cap.(pF) (pF) Calc. cap.1 M4 Original TDR design (Strip Gap: 0.2 mm) 16.7 21.69 ± ± × Width, 0.5 × Length 10.5 15.32 ± ± ± ± ± × Width, 0.5 × Length 8.5 11.82 ± × Length 5.9 9.32 ± ± ± × Width, 0.5 × Length 7.6 10.39 ± which is a 43% reduction over the original TDR configuration (Sector 5). If in addition the stripwidths are doubled as in Sector 8, the measured interstrip capacitance is 11.82 ± ± ∼ ∼ ∼ The motivation to perform additional measurements with the presence of a conductor plane comesfrom the discrepancy observed between the analytical calculations and the measurements shownin table 3. Clearly, nearby conductors modify the capacitance between adjacent strips. In a CMSGEM detector, the bottom of GEM3 represents a large additional electrode only 1 mm away fromthe strips. The average measured interstrip capacitances both with and without the presence of acopper-covered PCB to simulate the bottom of GEM3, and the ratio of the two, are presented foreach sector of the ROB in table 4. With the PCB present, the measured capacitances change by -2%to +34% over the measurements without PCB with most sectors showing an increased capacitancewith an average of +15%.The basic conclusions from the previous section still hold in this more realistic configuration.The measured interstrip capacitances with halved strip lengths and doubled strip widths are reducedby 17% and 22% over the original TDR configurations for the M1 and M4 modules, respectively.Sector 12 shows a 46% reduction in interstrip capacitance over the original TDR configuration(Sector 5) when in addition the trace lengths are minimized in M1.The interstrip capacitance between two adjacent strips obtained from the multi-strip FEAmodel both with and without the presence of a copper plate, and the ratio of the two are presentedin table 5. Because the FEA model considers multiple strips, it is difficult to simulate in additiontraces of varying lengths and widths. Consequently, in this model the traces are not considered, but– 14 – able 4 . Measurements of the GE2/1 ROB interstrip capacitance with and without a facing copper plate.
Sector Module Parameters Avg. meas. cap. Avg. meas. cap. C w / C w / o w/o plate with plate(pF) (pF)1 M4 Original TDR design (Strip Gap: 0.2 mm) 21.69 ± ± ± ± ± ± × Width, 0.5 × Length 15.32 ± ± ± ± ± ± ± ± ± ± ± ± ± ± ± × Width, 0.5 × Length 11.82 ± ± ± × Length 9.32 ± ± ± ± ± ± ± ± ± × Width, 0.5 × Length 10.39 ± ± ± the various strip and gap geometries are simulated, which results in simulations performed for eightof the twelve ROB sectors. The interstrip capacitances with and without a copper plate are almostthe same in the simulation, as can be seen from the ratio between them. As in the experimentalmeasurements, the lowest simulated interstrip capacitance for the M1 module is obtained by halvingthe strip length, and for the M4 module by doubling the strip width and halving the strip length.Although the overall relative variations of the FEA results from sector to sector are in agreementwith the variations in the experimental measurements, there exist differences in the absolute values.Comparing table 4 with table 5, we find that the values obtained from the FEA model are 22-40%lower than the experimentally measured values. This discrepancy is presumably due to the absenceof the signal traces when simulating the readout board using the FEA model.This observed discrepancy prompts us to create a 3D FEA model to include the contribution ofthe traces. However, it is technically difficult to simulate the traces of the whole custom-built GE2/1readout board (see figure 10), so a simple model with only two strips and two traces is consideredto model the 12 sectors with their various strip and trace geometries (see figure 8). This model canalso simulate the effect of the presence of copper at the bottom of the GEM3 foil. Table 6 shows theresults of the interstrip capacitance obtained from this two-strips-and-two-traces 3D FEA model,both with and without the presence of a copper plate, and the ratio of the two. Including the tracesin the model reduces the relative discrepancies with the experimental measurements significantly.Figure 13 shows a comparison of the results from this FEA model and experimental measurements,both without a copper plate (left) and with a copper plate (right). Results without copper platetypically agree better than results with copper plate.The multi-strip FEA model allows us also to calculate an interstrip capacitance between stripsthat are not necessarily directly adjacent. For example, we calculate the capacitance between thefirst strip and each of the next 128 strips in the presence of all the other strips as shown in figure 7(right). A fixed potential of 1 V is applied to the first strip and a fixed potential of 0 V is appliedto the other strip of interest. The capacitance between those two strips is then calculated with thepotential of all other strips varying accordingly. The result is shown in figure 14 for the first 128– 15 – able 5 . Interstrip capacitance from multi-strip FEA model of GE2/1 ROB with and without a copper plate.Note that sectors 4, 10-12 that vary trace lengths are not considered in the model and the error in the valuesof interstrip capacitance is 10 − pF. Sector Module Parameters FEA cap. FEA cap. C w / C w / o w/o plate with plate(pF) (pF)1 M4 Original TDR design (Strip Gap: 0.2 mm) 16.12 16.25 1.0082 M4 Gap: 0.3 mm 14.93 14.97 1.0033 M4 2 × Width, 0.5 × Length 12.64 12.69 1.0044 M4 Same as Sector 1 16.12 16.25 1.0085 M1 Original TDR design (Strip Gap: 0.2 mm) 13.16 13.61 1.0346 M1 Gap: 0.3 mm 11.24 11.27 1.0027 M1 Gap: 0.4 mm 10.43 10.56 1.0138 M1 2 × Width, 0.5 × Length 10.54 10.74 1.0189 M1 0.5 × Length 7.01 7.18 1.02410 M1 Same as Sector 5 13.16 13.61 1.03411 M1 Same as Sector 5 13.16 13.61 1.03412 M1 Same as Sector 8 10.54 10.74 1.018
Sector number I n t e r s t r i p c apa c i t an c e ( p F ) MeasurementFEA model
Without copper plate Sector number I n t e r s t r i p c apa c i t an c e ( p F ) MeasurementFEA model
With copper plate
Figure 13 . Left: Comparison between experimental measurements and results from two-strips-and-two-traces FEA model in 3D without a facing copper plate. Right: Comparison between experimental measure-ments and results from two-strips-and-two-traces FEA model in 3D with a facing copper plate. Note: Theerror bars for the measurements are present but are of the same order as the markers. strips without a PCB present. Beyond that, the capacitance does not change very much anymore.As the distance between the strips is increased, the interstrip capacitance decreases similar to aninverse function.
This paper presents and discusses analytical calculations and physical measurements of the interstripcapacitances for twelve different potential strip geometries and dimensions of the readout boards forthe smallest (M1) and largest (M4) modules in the GE2/1 detector for the CMS muon upgrade. We– 16 – able 6 . Interstrip capacitance from two-strips-and-two-traces 3D FEA model of GE2/1 ROB with andwithout a copper plate. Note: The error in the values of interstrip capacitance is 10 − pF. Sector Module Parameters FEA cap. FEA cap. C w / C w / o w/o plate with plate(pF) (pF)1 M4 Original TDR design (Strip Gap: 0.2 mm) 18.538 19.085 1.0292 M4 Gap: 0.3 mm 16.405 16.519 1.0073 M4 2 × Width, 0.5 × Length 11.606 11.924 1.0274 M4 Long traces 23.060 23.124 1.0025 M1 Original TDR design (Strip Gap: 0.2 mm) 16.251 16.709 1.0286 M1 Gap: 0.3 mm 13.294 13.506 1.0157 M1 Gap: 0.4 mm 12.313 12.816 1.0418 M1 2 × Width, 0.5 × Length 9.741 10.283 1.0559 M1 0.5 × Length 7.435 7.639 1.02710 M1 Original TDR design, Long traces 18.960 19.394 1.02211 M1 Original TDR design, Minimal traces 13.489 13.764 1.02012 M1 Minimal traces, 2 × Width, 0.5 × Length 8.796 8.873 1.008
Figure 14 . Interstrip capacitance between first strip and a non-adjacent strip using the multi-strip FEAmodel. For this calculation, a fixed potential of 1 V is applied to the first strip and a fixed potential of 0 V isapplied to the other strip of interest. – 17 –lso present results from 2D and 3D Finite Element Analysis modeling of this system. The maingoal of the study is to find configurations that minimize the interstrip capacitances and consequentlymaximize the signal-to-noise ratio for the detector. Specifically, we investigate if a configurationwith doubled strip width and halved strip length, which leaves total channel number in the detectorunchanged, can reduce interstrip capacitance compared with the original configuration.Overall, we find agreement at the 1.5–4.8% level between the two methods of calculationsand on the average at the 17% level between calculations and measurements. For the M1 (M4)module, the configuration with halved strip lengths and doubled strip widths results in a measured27 (29)% reduction over the original configuration. The corresponding calculations give reductionsof 33 (32)%. Increasing the width of the 0.02 cm gaps between strips by 50–100% only producesa 8–16% reduction in interstrip capacitance. An important observation from the measurements ofthe interstrip capacitance is the effect the signal traces on the other side of the board have on thecapacitance. With longer trace lengths, the interstrip capacitance increases by about 23 (30)% in theM1 (M4) module. We also find on average a 15% increase in the measured interstrip capacitancewith the addition of a copper-covered PCB which is used to simulate the capacitance contributionfrom the bottom of the third GEM foil.Finally, we briefly comment on the expected impact of the doubled strip width on detectorperformance. The main purpose of the GE2/1 detector is to help control the Level-1 muontrigger rates. In the original design [4, 5], two strips are ganged together to form a trigger "pad".Consequently, we expect no impact on trigger performance at all if one double-width strip is usedas one trigger "pad".We conclude that the best strategy to minimize interstrip capacitance for the GE2/1 readoutboards is indeed to halve the strip lengths and double the strip widths if one wants to keep thenumber of strips constant and to minimize the length of all signal traces on the board. We have nowadopted this design modification for all eight module types of the GE2/1 detector and will producethe final detector with this new strip design (see figure 4).
Acknowledgments
We gratefully acknowledge support from FRS-FNRS (Belgium), FWO-Flanders (Belgium), BSF-MES (Bulgaria), MOST and NSFC (China), BMBF (Germany), CSIR (India), DAE (India), DST(India), UGC (India), INFN (Italy), NRF (Korea), QNRF (Qatar), DOE (USA), and NSF (USA). Wethank Dr. Shady Khalil for providing access to COMSOL Multiphysics software and Qasim Khan forthe initial setup of the package for this work. Both are from the Electrical Engineering Department ofTexas A&M University at Qatar. The authors also wish to thank a team of undergraduate students atFlorida Institute of Technology (A. Bustos, J. Hammond, A. Lucciola, M. Werbiskis, and L. Shaw),for their help with performing the interstrip capacitance and trace dimension measurements.
References [1] CMS Collaboration,
The CMS experiment at the CERN LHC , JINST (2008) S08004.[2] ATLAS Collaboration, Observation of a new particle in the search for the standard model Higgsboson with the ATLAS detector at the LHC , Phys. Lett. B (2012) 1. – 18 –
3] CMS Collaboration,
Observation of a new boson at a mass of 125 GeV with the CMS experiment atthe LHC , Phys. Lett. B (2012) 30.[4] CMS Collaboration,
Technical Proposal for the Phase-II Upgrade of the Compact Muon Solenoid,Technical Report
CERN-LHCC-2015-010 , CMS-TDR-15-02 (2015).[5] CMS Collaboration,
The Phase-2 Upgrade of the CMS Muon Detectors, Technical Report
CERN-LHCC-2017-012 , CMS-TDR-016 (2017).[6] F. Sauli,
GEM: A new concept for electron amplification in gas detectors , Nucl. Instrum. Meth. A (1997) 531.[7] CMS Collaboration,
CMS Technical Design Report for the Muon Endcap GEM Upgrade, TechnicalReport
CERN-LHCC-2015-012 , CMS-TDR-013 (2015).[8] S. Gevorgian and H. Berg,
Line Capacitance and Impedance of Coplanar-Strip Waveguides onSubstrates with Multiple Dielectric Layers in Proc. 31 st European Microwave Conference , London,England, 2001, pp. 1-4.[9] J. M. Martinis, R. Barends, and A. N. Korotkov,
Calculation of Coupling Capacitance in PlanarElectrodes