A. Gianoli

Level Zero Trigger processor for the ultra rare kaon decay experiment—NA62

In the NA62 experiment at CERN-SPS the communication between detectors and the Lowest Level (L0) trigger processor is performed via Ethernet packets, using the UDP protocol. The L0 Trigger Processor handles the signals from sub-detectors that take part to the trigger generation. In order to choose the best solution for its realization, two different approaches have been implemented. The first approach is fully based on a FPGA device while the second one joins an off-the-shelf PC to the FPGA. The performance of the two systems will be discussed and compared.The main purpose of the NA62 experiment is to measure the branching ratio of the (ultra) rare decay

The level-0 trigger processor for the NA62 experiment

K+ rightarrow {pi}+{nu}bar{nu}

The drift chamber electronics for the NA48 experiment

with the precision of 10% collecting about 100 events with the Standard Model branching fraction in 3 years of data taking. The commissioning of the experiment after the 2014 pilot run and the prospects for the 2015 run are presented.

Operational experience with the NA62 Gigatracker

The NA62 experiment at the CERN-SPS is designed to study the K + → π+νν ultra-rare decay using a high intensity hadron beam and detecting its decay products. The lowest level (Level-0, L0) trigger processor represents a crucial component in reducing the event rate, estimated to be about 10 MHz for most of the sub-detectors which form the trigger, by a factor 10 with a maximum admitted latency of 1 ms. For the realization of the trigger selection, two different approaches were developed. A first project is fully based on FPGA, in which the whole logic for data selection is hardware programmed, while the second one joins an off-the-shelf PC to the FPGA for greater flexibility in trigger programming. Development, test results and performances during NA62 data taking will be presented.

GPU-based low-level trigger system for the standalone reconstruction of the ring-shaped hit patterns in the RICH Cherenkov detector of NA62 experiment

A drift chamber readout electronics for about 8000 channels with concurrent data recording and readout has been developed to update NA48 experiment existing system. Drift times are measured in bins of 1.56 ns with respect to the continuously running 40 MHz experiment clock. The architecture is based on commercially available hardware for cost effectiveness and flexibility. The design of the electronics is described, and results from data-taking runs are presented.

GPU-based Low-Level Trigger System for Real-Time Cherenkov Ring Fitting

The Gigatracker is a hybrid silicon pixel detector developed for the NA62 experiment at CERN, which aims at measuring the branching fraction of the ultra-rare kaon decay K

Fast algorithm for real-time rings reconstruction

^{+} rightarrow pi^{+} nu overline{nu}

GPUs for the realtime low-level trigger of the NA62 experiment at CERN

at the CERN SPS. The detector has to track particles in a 75~GeV/c hadron beam with a flux reaching 1.3~MHz/mm

The P326 (NA48/3) Gigatracker: Requirements and design concept

^2

The NA62 GigaTracker

and provide single-hit timing with better than 200 ps r.m.s. resolution for a total material budget of less than 0.5%~X