A.L. Lentine

GaAs MQW modulators integrated with silicon CMOS

We demonstrate integration of GaAs-AlGaAs multiple quantum well modulators to silicon CMOS circuitry via flip-chip solder-bonding followed by substrate removal. We obtain 95% device yield for 32/spl times/32 arrays of devices with 15 micron solder pads. We show operation of a simple circuit composed of a modulator and a CMOS transistor.<<ETX>>

Symmetric self-electrooptic effect device: optical set-reset latch, differential logic gate, and differential modulator/detector

The symmetric self-electrooptic-effect device (S-SEED), a structure consisting of two p-i-n diodes electrically connected in series and acting as an optically bistable set-reset latch, is discussed. Applications and extensions of this device are also discussed. The devices do not require the critical biasing that is common to most optically bistable devices and thus is more useful for system applications. They have been optically cascaded in a photonic ring counter and have been used to perform different NOR, OR, NAND, and AND logic functions. Using the same device, a differential modulator that generates a set of complementary output beams with a single voltage control lead and a differential detector that gives an output voltage dependent on the ratio of the two optical input powers have been demonstrated. >

Symmetric self‐electro‐optic effect device: Optical set‐reset latch

We demonstrate an integrated symmetric self‐electro‐optic effect device consisting of two quantum well p‐i‐n diodes electrically connected in series. The device acts as a bistable optical memory element with individual set (S) and reset (R) inputs and complementary outputs (optical S‐R latch). The switching point is determined by the ratio of the two inputs, making the device insensitive to optical power supply fluctuations when both power beams are derived from the same source. The device also shows time‐sequential gain, in that the state can be set using low‐power beams and read out with subsequent high‐power beams. The device showed bistability for voltages greater than 3 V, incident optical switching energy densities of ∼16 fJ/μm2, and was tested to a switching time of 40 ns.

Five-stage free-space optical switching network with field-effect transistor self-electro-optic-effect-device smart-pixel arrays

The design, construction, and operational testing of a five-stage, fully interconnected 32 × 16 switching fabric by the use of smart-pixel (2, 1, 1) switching nodes are described. The arrays of switching nodes use monolithically integrated GaAs field-effect transistors, multiple-quantum-well p-i-n detectors, and self-electro-optic-device modulators. Each switching node incorporates 25 field-effect transistors and 17 p-i-n diodes to realize two differential optical receivers, the 2 × 1 node switching logic, a single-bit node control memory, and one differential optical transmitter. The five stages of node arrays are interconnected to form a two-dimensional banyan network by the use of Fourier-plane computer-generated holograms. System input and output are made by two-dimensional fiber-bundle matrices, and the system optical hardware design incorporates frequency-stabilized lasers, pupil-division beam combination, and a hybrid micro-macro lens for fiber-bundle imaging. Optomechanical packaging of the system ut lizes modular kinematic component positioning and active thermal control to enable simple rapid assembly. Two preliminary operational experiments are completed. In the first experiment, five stages are operated at 50 Mbits/s with 15 active inputs and outputs. The second experiment attempts to operate two stages of second-generation node arrays at 155 Mbits/s, with eight of the 15 active nodes functioning correctly along the straight switch-routing paths.

Evolution of the SEED technology: bistable logic gates to optoelectronic smart pixels

The recent evolution of quantum-well self-electrooptic effect devices (SEEDs) for application in free-space optical switching and computing systems is reviewed. Requirements of these systems have stimulated the development of devices usable in large systems of cascaded devices (the symmetric SEED), large two-dimensional arrays of these devices with improved physical performance, logically smarter extensions of these devices (logic-SEEDs), and devices integrating electronic transistors with quantum-well modulators and detectors for both reducing the required optical energies and increasing functionality. This progress and its implications for future developments are summarized. >

Batch fabrication and operation of GaAs-Al/sub x/Ga/sub 1-x/As field-effect transistor-self-electrooptic effect device (FET-SEED) smart pixel arrays

The structure, processing, and performance of arrays of integrated field-effect transistor-self-electrooptic effects devices (FET-SEEDs) consisting of doped-channel field-effect transistors, multiple quantum-well (MQW) modulators, and p-i-n MQW detectors are discussed. The performance of the FETs and SEEDs such as g/sub m/ and contrast, is equivalent to that obtained when they are made separately. Typical values are g/sub m/=80 mS/mm and contrast of 3. The largest arrays contain 128 circuits. The circuits operate at speeds as fast as 500 Mb/s, with optical input switching energy of approximately=400 fJ. At 170 Mb/s, the required optical input switching energy is approximately=70 fJ. This optical energy is at least a factor of 20 less than for symmetric SEEDs (S-SEEDs) with the same optical window sizes. Hence, FET-SEEDs provide superior performance compared to conventional S-SEEDs. >

Free-space digital optical systems

Within the past 15 years there has been significant progress in the development of two-dimensional arrays of optical and optoelectronic devices. This progress has, in turn, led to the construction of several free-space digital optical system demonstrators. The first was an optical master-slave flip-flop using Hughes liquid-crystal light valves as optical logic gates and computer-generated holograms as the gate-to-gate interconnects. This was demonstrated at USC in 1984. Since then there have been numerous demonstrations of free-space digital optical systems including a simple optical computing system (1990) and five switching fabrics designated System/sub 1/ (1988), System/sub 2/ (1989), System/sub 3/ (1990), System/sub 4/ (1991) and System/sub 5/ (1993). The main focus of this paper will be to describe the five switching fabric demonstrators constructed by AT&T in Naperville, IL. The paper will begin with an overview of the SEED technology which was the device platform used by the demonstrators. This will be followed by a discussion of the architecture, optics, and optomechanics developed for each of the five demonstrators. >

A 2 kbit array of symmetric self-electrooptic effect devices

A 64*32 array of symmetric self-electrooptic effect devices, each of which can be operated as a memory element or logic gate, is discussed. The required optical switching energies of the devices were approximately 800 fJ and approximately 2.5 pJ at 6 and 15 V bias, respectively, and the fastest switching time measured was approximately 1 ns. Either state of the devices could be held with continuous or pulsed incident optical signals with an average optical incident power per input beam of approximately 200 nW or less than 1 mW for the entire array. Photocurrent and reflectivity were measured for all 2048 devices. Only one device failed to have the negative resistance required for bistability, and only nine of the devices fell outside a band of +or-20% of the mean. Additionally, over 200 devices in the array were operated in parallel using low-power semiconductor laser diodes.<<ETX>>

Six-stage digital free-space optical switching network using symmetric self-electro-optic-effect devices

We describe the design and demonstration of an extended generalized shuffle interconnection network, centrally controlled by a personal computer. A banyan interconnection pattern is implemented by use of computer-generated Fourier holograms and custom metallization at each 32 × 32 switching node array. Each array of electrically controlled tristate symmetric self-electro-optic-effect devices has 10,240 optical pinouts and 32 electrical pinouts, and the six-stage system occupies a 9 in. × 12.5 in. (22.9 cm × 31.7 cm) area. Details of the architecture, optical and mechanical design, and system alignment and tolerancing are presented.

Optical receivers for optoelectronic VLSI

We describe our work on the design and testing of optical receivers for use in optoelectronic VLSI. The local nature of the optoelectronic VLSI system permits novel receiver designs, incorporating multiple optical beams and/or synchronous operation, while the requirement of realizing large numbers of receivers on a single chip severely constrains area and power consumption. We describe four different receiver designs, and their different operating modes. Results include 1-Gb/s high-impedance, two-beam diode-clamped FET-SEED receivers, single and dual-beam transimpedance receivers realized with a hybrid attachment of multiple-quantum well devices to 0.8-/spl mu/m linewidth CMOS operating to 1 Gb/s, and synchronous sense-amplifier-based optical receivers with low (/spl sim/1 mW) power consumption. Finally, we introduce a measure of receiver performance that includes area and power consumption.