A. Van Calster

Polycrystalline CdSe films for thin film transistors

Abstract In this paper X-ray, ESCA, TEM and electrical measurements on evaporated CdSe films, used in thin film transistors (TFT), are reported. Special attention has been paid to semiconductor films obtained from recrystallized mixtures of CdSe and 1–2% In 2 Se 3 . Such films might be represented as (3CdSe) x (In 2 Se 3 ) 1- x . Doping the CdSe evaporation source with In yields 20 μm self-aligned TFTs with excellent characteristics: electron mobility in the evaporated thin films increases from 20–50 cm 2 /V · s for undoped films to more than 100 cm 2 /V · s for doped films. DC stability behaviour is also improved: the TFT current drop after 180 s is reduced from 30% to less than 5%.

A comparison between silicon-nitride films made by PCVD of N2-SiH4/Ar and N2-SiH4/He

Etude des couches obtenues par ellipsometrie, donnees Auger, donnees IR, contrainte mecanique et mesures electriques

Stabilizer Concentration and Local Environment: Their Effects on Electroless Nickel Plating of PCB Micropads

With the advent of flip chip assembly, pads to be plated on printed circuit boards (PCBs) have shrunk dramatically to around . As a result, most commercial electroless nickel baths will fail to deposit nickel on such small micropads. In this paper, using a specially designed PCB layout, the effects of concentration and local environment are studied. A competition mechanism between two opposite actions, the adsorption from bulk solution by diffusion and the burying by nickel deposition, is used to explain the effect of as a catalytic inhibitor. On a constantly growing surface, the dynamic density of adsorbed is the net result of these two opposite actions. Using this competition mechanism, the skipping problem of micropads is attributed to the combined result of nonlinear diffusion and high concentration of in the bulk solution. This competition mechanism also gives a new explanation for the effect of potential pinning. In the case of potential pinning, galvanic effect by electrons flowing from one area to another only exists during the initial period of nickel deposition. Once it is started, nickel deposition on any area is maintained by the electroless process, and hence, is actually self‐supporting, By reducing the bulk concentration of to a lower range in a commercial bath, we have realized consistent nickel plating on micropads as fine as 50 μm in diameter.

A versatile micropower high-voltage flat-panel display driver in a 100-V 0.7-/spl mu/m CMOS intelligent interface technology

A versatile architecture for monolithic low-power high-voltage flat-panel display drivers is presented. A prototype of such a driver chip was designed and fabricated in the 100-V 0.7-/spl mu/m CMOS intelligent interface technology (I/sup 2/T) of Alcatel MicroElectronics. It features 100-V output driving capability, while the operation of the entire driver chip is controlled by means of 3- to 5-V digital signals. Special high-voltage level-shifter circuits, based on the dynamic charge control concept, were developed to reduce the internal power consumption of the driver chip to extremely low values of 1 to 2 /spl mu/W per driver output. A powerful on-chip control unit supports numerous display addressing schemes and very complex multilevel output waveforms can be synthesized. These attractive electrical characteristics, together with the pronounced flexibility and multifunctionality, make this driver architecture ideally suited for a variety of flat-panel displays, especially in battery-powered applications.

2-MHz clocked LCD drivers on glass

A poly-CdSe thin-film transistor (TFT) liquid crystal display (LCD) driver circuit which is integrated on the display itself, reducing the interconnections to the display, is described. The circuit can be used to drive the rows as well as the columns of active and passive matrix LCDs. Drivers made in a 25- mu m technology operate at frequencies up to 2 MHz. Simulations indicate a maximum operating frequency of 8 MHz for a 12.5- mu m technology. By using a time-multiplexing addressing scheme, gray scales can be obtained. In order to address high-resolution displays with gray scales, parallel operating drivers can be used, requiring only one extra connection per parallel driver. >

On the field effect in polycrystalline CdSe thin-film transistors

Based on the grain barrier model of Levinson an expression of the off‐current Ioff of a thin‐film transistor is derived.The dependence of Ioff on the donor concentration ND and the semiconductor thickness ds is discussed and compared to experimental data. It is shown that NDds has to be smaller than the grain‐boundary trap concentration in order to obtain enhancement thin‐film transistors completely turned off at VG=0.

High-voltage polycrystalline CdSe thin-film transistors

The properties of self-aligned high-voltage CdSe thin-film transistors (TFTs) are described. By analyzing the different failure mechanisms, it is found that In-doped CdSe makes device operation up to 200 V feasible. Furthermore, the high-voltage CdSe TFT shows excellent low off currents and high transconductance. >

Evaluation of a 64 x 64 CdSe TFT addressed ACTFEL display demonstrator

An operating ACTFEL (AC thin-film electroluminescent display), addressed with TFTs, has been demonstrated. To achieve this, the authors used self-healing electrodes, limited the power supplied to the display, and used a stepped annealing cycle for the TFTs. The display could be driven with 10-V external drivers at a frame rate of 50 Hz and an EL driving frequency of 100 Hz.<<ETX>>

Theoretical influence of surface states and bulk traps on thin film transistor characteristics

Abstract It is shown that the theoretical derivation of drain current versus drain voltage characteristics of thin film transistors (TFT) is obtained, in the gradual channel approximation, by integration of the conduction electron charge versus gate voltage curve. The influence of bulk traps and surface states on these curves is evaluated quantitatively by using specific models. It is shown that at high donor concentrations, bulk traps have much more influence on TFT characteristics and even make it difficult to obtain good characteristics. At low donor concentrations, surface states have more influence but still allow good characteristics except at unusually high concentrations. Finally, the importance is shown of measurements of the channel conductance at low drain voltage as a function of the gate voltage for gaining insight in the physical parameters that determine TFT behavior.

VAN LCOS Microdisplays: A Decade of Technological Evolution

Microdisplays of the liquid crystals on silicon (LCOS) type have gone through a rapid evolution during the last decade. We present an overview of how vertically aligned nematic (VAN) LCOS have evolved from an attractive, but notoriously difficult and even infamous technology, to the mainstream microdisplay technology that it is today. At the same time, we highlight a number of remaining issues and concerns, and present some ideas of how to remedy them.