Aaron D. Franklin
Duke University
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Featured researches published by Aaron D. Franklin.
Nano Letters | 2012
Aaron D. Franklin; Mathieu Luisier; Shu-Jen Han; George S. Tulevski; Chris M. Breslin; Lynne M. Gignac; Mark Lundstrom; Wilfried Haensch
This first demonstration of CNT transistors with channel lengths down to 9 nm shows substantially better scaling behavior than theoretically expected. Numerical simulations suggest that a possible explanation for the surprisingly good performance is a result of the gate modulating both the charge in the channel and in the contact regions. The unprecedented performance should ignite exciting new research into improving the purity and placement of nanotubes, as well as optimizing CNT transistor structure and integration. Results from aggressively scaling these molecular-channel transistors exhibit their strong suitability for a low-voltage, high-performance logic technology.
Nature Nanotechnology | 2010
Aaron D. Franklin; Zhihong Chen
Carbon nanotube field-effect transistors are strong candidates in replacing or supplementing silicon technology. Although theoretical studies have projected that nanotube transistors will perform well at nanoscale device dimensions, most experimental studies have been carried out on devices that are about ten times larger than current silicon transistors. Here, we show that nanotube transistors maintain their performance as their channel length is scaled from 3 µm to 15 nm, with an absence of so-called short-channel effects. The 15-nm device has the shortest channel length and highest room-temperature conductance (0.7G₀) and transconductance (40 µS) of any nanotube transistor reported to date. We also show the first experimental evidence that nanotube device performance depends significantly on contact length, in contrast to some previous reports. Data for both channel and contact length scaling were gathered by constructing multiple devices on a single carbon nanotube. Finally, we demonstrate the performance of a nanotube transistor with channel and contact lengths of 20 nm, an on-current of 10 µA, an on/off current ratio of 1 x 10⁵, and peak transconductance of 20 µS. These results provide an experimental forecast for carbon nanotube device performance at dimensions suitable for future transistor technology nodes.
ACS Nano | 2009
Jonathan C. Claussen; Aaron D. Franklin; Aeraj ul Haque; D. Marshall Porterfield; Timothy S. Fisher
Networks of single-walled carbon nanotubes (SWCNTs) decorated with Au-coated Pd (Au/Pd) nanocubes are employed as electrochemical biosensors that exhibit excellent sensitivity (2.6 mA mM(-1) cm(-2)) and a low estimated detection limit (2.3 nM) at a signal-to-noise ratio of 3 (S/N = 3) in the amperometric sensing of hydrogen peroxide. Biofunctionalization of the Au/Pd nanocube-SWCNT biosensor is demonstrated with the selective immobilization of fluorescently labeled streptavidin on the nanocube surfaces via thiol linking. Similarly, glucose oxidase (GOx) is linked to the surface of the nanocubes for amperometric glucose sensing. The exhibited glucose detection limit of 1.3 muM (S/N = 3) and linear range spanning from 10 muM to 50 mM substantially surpass similar CNT-based biosensors. These results, combined with the structures compatibility with a wide range of biofunctionalization procedures, would make the nanocube-SWCNT biosensor exceptionally useful for glucose detection in diabetic patients and well suited for a wide range of amperometric detection schemes for clinically important biomarkers.
Science | 2015
Aaron D. Franklin
Improving transistors with nanomaterials High-performance silicon transistors and thin-film transistors used in display technologies are fundamentally limited to miniaturization. Incorporating nanomaterials—such as carbon nanotubes, graphene, and related two-dimensional materials like molybdenum disulfide—into these devices as gate materials may circumvent some of these limitations. Franklin reviews the opportunities and challenges for incorporating nanomaterials into transistors to improve performance. Because high-performance transistors are distinct from thin-film transistors, incorporating them into flexible or transparent platforms raises new challenges. Science, this issue 10.1126/science.aab2750 BACKGROUND Transistors are one of the most enabling “hidden” technologies of all time and have facilitated the development of computers, the Internet, thin mobile displays, and much more. Silicon, which has been the material of choice for transistors in nearly every application for decades, is now reaching the fundamental limits to what it can offer for future transistor technologies. The newest display technologies are already turning to metal oxide materials, such as indium gallium zinc oxide (IGZO), for the improvements needed to drive organic light-emitting diodes. Ranging from applications such as display backplanes to high-performance microprocessors for servers, nanomaterials offer lasting advantages for the coming decades of transistor technologies. In this Review, the advantages of nanomaterials are discussed in the context of different transistor applications, along with the breakthroughs needed for nanomaterial transistors to enable the next generation of technological advancement. ADVANCES About 15 years ago, nanomaterials began receiving focused attention for transistors. Carbon nanotubes—molecules consisting of a cylindrical single layer of carbon atoms arranged in a hexagonal lattice—were the first to be given serious consideration, and their benefits quickly became widely acclaimed. Given their ability to transport electrical current with near-zero resistance, even at room temperature, the explosion of interest in nanotubes for electronics was understandable. Graphene, a related allotrope of carbon, benefited from the expansive interest carbon nanotubes had created for nanomaterial electronics. Although graphene transistors eventually proved less viable for digital applications, owing to the absence of an energy band gap, the excitement over graphene ushered in a complete revolution of interest in similar two-dimensional materials. Now, transition metal dichalcogenides and the so-called X-ene family of nanomaterials (e.g., silicence, phosphorene) dominate the attention of the nanoelectronics community. Hardly a day goes by without a paper being published on some advancement related to the use of nanomaterials in transistors. Hence, this Review focuses on how to keep such progress in the proper context with respect to the target transistor application, as well as the consideration of nanomaterials for completely new application spaces. OUTLOOK The benefits and practicality differ for each nanomaterial, and varied amounts of progress have been made in considering each of them for transistors. In just a few short years, thousands of papers have been published on improving synthesis or demonstrating simple functions of the newer nanomaterials. However, reflection on whether their newness translates to actual superiority over other options is warranted. Clearly, all of the nanomaterial possibilities offer certain advantages for future transistor technologies, but some do so with fewer caveats than others. Future research will benefit from keeping scientific advancement of nanomaterial transistors in line with end-goal deliverables. Overall, considering that only 15 years have elapsed since the study of nanomaterials for transistors began in earnest, the toolbox of available options and the developments toward overcoming challenges are promising. Technologies enabled by high-performance and thin-film transistors over the past 25 years. (Top) Silicon transistors have driven the microprocessors used in computational devices ranging from low-power gadgets to large servers. (Bottom) Various forms of cheaper silicon enabled the display revolution, now being shared by IGZO. (Right) Nanomaterials may be the next transistor material for enabling a new generation of technologies. CREDITS: Old computer: Wikimedia Commons/Creative Commons; Other computer: J.Dray/Flickr; Laptop: C. Berkeley/Flickr; Supercomputer: Wikimedia Commons/Creative Commons; Smartphone: Pixabay/Creative Commons; Camera: DAYJOY/Flickr; FLAT SCREEN TV: AV Hire London/Flickr; Curved TV: SamsungTomorrow/Flickr For more than 50 years, silicon transistors have been continuously shrunk to meet the projections of Moore’s law but are now reaching fundamental limits on speed and power use. With these limits at hand, nanomaterials offer great promise for improving transistor performance and adding new applications through the coming decades. With different transistors needed in everything from high-performance servers to thin-film display backplanes, it is important to understand the targeted application needs when considering new material options. Here the distinction between high-performance and thin-film transistors is reviewed, along with the benefits and challenges to using nanomaterials in such transistors. In particular, progress on carbon nanotubes, as well as graphene and related materials (including transition metal dichalcogenides and X-enes), outlines the advances and further research needed to enable their use in transistors for high-performance computing, thin films, or completely new technologies such as flexible and transparent devices.
Nature | 2013
Aaron D. Franklin
Purifying and positioning carbon nanotubes are challenges for the synthesis of electronic devices based on these nanomaterials. Recent advances in such areas reveal trends that are beating an exciting path towards transistor technology.
Nano Letters | 2011
Shu-Jen Han; Keith A. Jenkins; Alberto Valdes Garcia; Aaron D. Franklin; Ageeth A. Bol; Wilfried Haensch
While graphene transistors have proven capable of delivering gigahertz-range cutoff frequencies, applying the devices to RF circuits has been largely hindered by the lack of current saturation in the zero band gap graphene. Herein, the first high-frequency voltage amplifier is demonstrated using large-area chemical vapor deposition grown graphene. The graphene field-effect transistor (GFET) has a 6-finger gate design with gate length of 500 nm. The graphene common-source amplifier exhibits ∼5 dB low frequency gain with the 3 dB bandwidth greater than 6 GHz. This first AC voltage gain demonstration of a GFET is attributed to the clear current saturation in the device, which is enabled by an ultrathin gate dielectric (4 nm HfO(2)) of the embedded gate structures. The device also shows extrinsic transconductance of 1.2 mS/μm at 1 V drain bias, the highest for graphene FETs using large-scale graphene reported to date.
ACS Nano | 2014
George S. Tulevski; Aaron D. Franklin; David J. Frank; Jose M. Lobez; Qing Cao; Hongsik Park; Ali Afzali; Shu-Jen Han; James B. Hannon; Wilfried Haensch
The slow-down in traditional silicon complementary metal-oxide-semiconductor (CMOS) scaling (Moores law) has created an opportunity for a disruptive innovation to bring the semiconductor industry into a postsilicon era. Due to their ultrathin body and ballistic transport, carbon nanotubes (CNTs) have the intrinsic transport and scaling properties to usher in this new era. The remaining challenges are largely materials-related and include obtaining purity levels suitable for logic technology, placement of CNTs at very tight (∼5 nm) pitch to allow for density scaling and source/drain contact scaling. This review examines the potential performance advantages of a CNT-based computing technology, outlines the remaining challenges, and describes the recent progress on these fronts. Although overcoming these issues will be challenging and will require a large, sustained effort from both industry and academia, the recent progress in the field is a cause for optimism that these materials can have an impact on future technologies.
ACS Nano | 2013
George S. Tulevski; Aaron D. Franklin; Ali Afzali
The isolation of semiconducting carbon nanotubes (CNTs) to ultrahigh (ppb) purity is a prerequisite for their integration into high-performance electronic devices. Here, a method employing column chromatography is used to isolate semiconducting nanotubes to 99.9% purity. The study finds that by modifying the solution preparation step, both the metallic and semiconducting fraction are resolved and elute using a single surfactant system, allowing for multiple iterations. Iterative processing enables a far more rapid path to achieving the level of purities needed for high performance computing. After a single iteration, the metallic peak in the absorption spectra is completely attenuated. Although absorption spectroscopy is typically used to characterize CNT purity, it is found to be insufficient in quantifying solutions of high purity (>98 to 99%) due to low signal-to-noise in the metallic region of ultrahigh purity solutions. Therefore, a high throughput electrical testing method was developed to quantify the degree of separation by characterizing ∼4000 field-effect transistors fabricated from the separated nanotubes after multiple iterations of the process. The separation and characterization methods described here provide a path to produce the ultrahigh purity semiconducting CNT solutions needed for high performance electronics.
Nano Letters | 2013
Aaron D. Franklin; Siyuranga O. Koswatta; Damon B. Farmer; Joshua T. Smith; Lynne M. Gignac; Chris M. Breslin; Shu-Jen Han; George S. Tulevski; Hiroyuki Miyazoe; Wilfried Haensch; J. Tersoff
Among the challenges hindering the integration of carbon nanotube (CNT) transistors in digital technology are the lack of a scalable self-aligned gate and complementary n- and p-type devices. We report CNT transistors with self-aligned gates scaled down to 20 nm in the ideal gate-all-around geometry. Uniformity of the gate wrapping the nanotube channels is confirmed, and the process is shown not to damage the CNTs. Further, both n- and p-type transistors were realized by using the appropriate gate dielectric-HfO2 yielded n-type and Al2O3 yielded p-type-with quantum simulations used to explore the impact of important device parameters on performance. These discoveries not only provide a promising platform for further research into gate-all-around CNT devices but also demonstrate that scalable digital switches with realistic technological potential can be achieved with carbon nanotubes.
Science | 2015
Qing Cao; Shu-Jen Han; J. Tersoff; Aaron D. Franklin; Yu Zhu; Zhen Zhang; George S. Tulevski; Jianshi Tang; Wilfried Haensch
Making better small contacts Semiconducting single-walled carbon nanotubes have potential size and conductivity advantages over silicon for making smaller transistors. However, as metal electrical contacts decrease in size, the associated resistance increases to impractical values. Cao et al. reacted molybdenum films with semiconducting carbon nanotubes to create a carbide contact. The resistance of these contacts remained low even for 10-nm-scale contacts. Science, this issue p. 68 A covalent contact formed by the reaction of molybdenum and semiconducting carbon nanotubes has no Schottky barrier. Moving beyond the limits of silicon transistors requires both a high-performance channel and high-quality electrical contacts. Carbon nanotubes provide high-performance channels below 10 nanometers, but as with silicon, the increase in contact resistance with decreasing size becomes a major performance roadblock. We report a single-walled carbon nanotube (SWNT) transistor technology with an end-bonded contact scheme that leads to size-independent contact resistance to overcome the scaling limits of conventional side-bonded or planar contact schemes. A high-performance SWNT transistor was fabricated with a sub–10-nanometer contact length, showing a device resistance below 36 kilohms and on-current above 15 microampere per tube. The p-type end-bonded contact, formed through the reaction of molybdenum with the SWNT to form carbide, also exhibited no Schottky barrier. This strategy promises high-performance SWNT transistors, enabling future ultimately scaled device technologies.