Aaron V. Gin

Growth, defect formation, and morphology control of germanium-silicon semiconductor nanowire heterostructures.

By the virtue of the nature of the vapor-liquid-solid (VLS) growth process in semiconductor nanowires (NWs) and their small size, the nucleation, propagation, and termination of stacking defects in NWs are dramatically different from that in thin films. We demonstrate germanium-silicon axial NW heterostructure growth by the VLS method with 100% composition modulation and use these structures as a platform to understand how defects in stacking sequence force the ledge nucleation site to be moved along or pinned at a single point on the triple-phase circumference, which in turn determines the NW morphology. Combining structural analysis and atomistic simulation of the nucleation and propagation of stacking defects, we explain these observations based on preferred nucleation sites during NW growth. The stacking defects are found to provide a fingerprint of the layer-by-layer growth process and reveal how the 19.5° kinking in semiconductor NWs observed at high Si growth rates results from a stacking-induced twin boundary formation at the NW edge. This study provides basic foundations for an atomic level understanding of crystalline and defective ledge nucleation and propagation during [111] oriented NW growth and improves understanding for control of fault nucleation and kinking in NWs.

Advanced core/multishell germanium/silicon nanowire heterostructures: Morphology and transport

A precise level of control over morphology and transport in germanium/silicon core/multishell semiconductor nanowires is attained by interface engineering. Epitaxial in situ growth of such advanced heterostructures is achieved, enabling smooth and crystalline shell quality without ex situ thermal or chemical treatment. Transport simulation predicts such heterostructures with engineered energy band-edges will exhibit enhanced on-currents and transconductances over traditional device designs. Based on this synthesis approach, a 2× improvement in experimental hole mobility, transconductance, and on-currents is demonstrated for heterostructures with smooth surface morphologies compared to those with rough surface morphologies and record normalized on-currents for p-type field effect transistors are achieved.

Synthesis, fabrication, and characterization of Ge/Si axial nanowire heterostructure tunnel FETs

Axial Ge/Si heterostructure nanowires allow energy band-edge engineering along the axis of the nanowire, which is the charge transport direction, and allows the realization of novel asymmetric device architectures. This work reports on two advances in the area of heterostructure nanowires and tunnel FETs: (i) the realization of 100 % compositionally modulated Si/Ge axial heterostructure nanowires with lengths suitable for device fabrication and (ii) the design and implementation of Schottky barrier tunnel FETs on these nanowires for high-on currents and suppressed ambipolar behavior. Initial prototype devices resulted in a current drive in excess of 100 µA/µm (I/πD) and 105 Ion/Ioff ratios. These results demonstrate the potential of such asymmetric heterostructures (both in the semiconductor channel and at the metal-semiconductor interfaces) for low-power and high performance electronics.

Active infrared materials for beam steering.

The mid-infrared (mid-IR, 3 {micro}m -12 {micro}m) is a highly desirable spectral range for imaging and environmental sensing. We propose to develop a new class of mid-IR devices, based on plasmonic and metamaterial concepts, that are dynamically controlled by tunable semiconductor plasma resonances. It is well known that any material resonance (phonons, excitons, electron plasma) impacts dielectric properties; our primary challenge is to implement the tuning of a semiconductor plasma resonance with a voltage bias. We have demonstrated passive tuning of both plasmonic and metamaterial structures in the mid-IR using semiconductors plasmas. In the mid-IR, semiconductor carrier densities on the order of 5E17cm{sup -3} to 2E18cm{sup -3} are desirable for tuning effects. Gate control of carrier densities at the high end of this range is at or near the limit of what has been demonstrated in literature for transistor style devices. Combined with the fact that we are exploiting the optical properties of the device layers, rather than electrical, we are entering into interesting territory that has not been significantly explored to date.