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Dive into the research topics where Abhijit Choudhury is active.

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Featured researches published by Abhijit Choudhury.


IEEE Journal of Emerging and Selected Topics in Power Electronics | 2014

DC-Link Voltage Balancing for a Three-Level Electric Vehicle Traction Inverter Using an Innovative Switching Sequence Control Scheme

Abhijit Choudhury; Pragasen Pillay; Sheldon S. Williamson

This paper presents an advanced switching sequence for space-vector pulsewidth modulation (SV-PWM)-based three level neutral-point clamped inverter. The developed scheme helps to reduce the number of converter switching sequences, compared with the conventional SV-PWM strategy, and keeps the voltage difference between the two dc-link capacitors at the desired voltage level. The developed test bench is utilized for a permanent magnet synchronous machine (PMSM) drive for electric vehicle applications. The proposed strategy is compared with the performance of a PI controller-based voltage balancing strategy. The proposed control strategy is based on the nearest three-vector (N3V) scheme, with a hysteresis control of the dc-link capacitor voltage difference. Conventional N3V scheme uses a higher number of switching sequences, which makes the switching losses higher. In addition, these switching sequences are not same for all subsectors. This makes the switching frequency to vary extensively. In the proposed control strategy, a reduced number of switching sequences are used, and they are same for all subsectors. This makes the system operate with constant switching frequency. Detailed simulation studies are performed to verify the performance of the proposed control strategy. The performance-based test results are then compared with those of a PI controller-based strategy. Experimental test results show significant improvement in the performance of the PMSM with respect to dc-link capacitor voltage variation as well as wide speed and torque range of machine operation.


IEEE Journal of Emerging and Selected Topics in Power Electronics | 2014

Comparative Analysis Between Two-Level and Three-Level DC/AC Electric Vehicle Traction Inverters Using a Novel DC-Link Voltage Balancing Algorithm

Abhijit Choudhury; Pragasen Pillay; Sheldon S. Williamson

This paper presents an extensive comparative study between a two- and three-level inverter for electric vehicle traction applications. An advanced control strategy for balancing the two dc-link capacitors is also proposed. In this paper, the main focus is on the total voltage harmonic distortion (%THDv), the analytical derivation of the three-level capacitor currents, and the voltage balancing of two capacitor voltages. For generating the gate signals, space vector pulse width modulation (SV-PWM) is used. The developed voltage-balancing scheme helps to reduce the number of converter switching sequences, compared with the conventional SV-PWM strategy, and keeps the voltage difference between the two dc-link capacitors at the desired voltage level. The developed test-bench is used for a permanent magnet synchronous machine drive for electric vehicle (EV) applications. Detailed simulation studies are performed using MATLAB/Simulink block set and experimental verification is achieved using dSpace based real-time simulator. Both the simulation and experimental results show a significant improvement in reduction of total harmonic distortion (%THDv) for the three-level inverter.


IEEE Transactions on Industrial Electronics | 2016

Modified DC-Bus Voltage-Balancing Algorithm Based Three-Level Neutral-Point-Clamped IPMSM Drive for Electric Vehicle Applications

Abhijit Choudhury; Pragasen Pillay; Sheldon S. Williamson

A modified dc-link voltage-balancing scheme for a three-level neutral-point-clamped inverter with an interior permanent magnet synchronous machine is presented with a wider range of machine operation including field weakening. It uses two dc-link voltage sensors to take care of the voltage differences and keeps it to a required tolerance level. A switching control strategy is developed using a space vector pulsewidth modulation scheme. The number of vectors per switching cycle is optimized to five, and changes in the control strategy depending on the two capacitor voltage differences are only allowed to take place at the start of each switching cycle. This helps in reducing the switching losses. A detailed analysis on the larger capacitor voltage deviation at high modulation index and leading power factor is analyzed, and four control strategies are developed to reduce it. Simulation studies are carried out in MATLAB/Simulink platform, and an experimental setup is developed using a DSpace®-based real-time emulator. Simulation and experimental results show the effectiveness of the proposed system.


IEEE Journal of Emerging and Selected Topics in Power Electronics | 2015

A Hybrid PWM-Based DC-Link Voltage Balancing Algorithm for a Three-Level NPC DC/AC Traction Inverter Drive

Abhijit Choudhury; Pragasen Pillay; Sheldon S. Williamson

This paper presents a hybrid pulsewidth modulation (H-PWM) technique, for a three-level neutral point clamped electric vehicle (EV) traction inverter drive. The proposed strategy depicts the advantages of both classic space-vector PWMs (SV-PWMs) as well as carrier-based PWM (CB-PWM). The duty cycles for the traction inverter switches are calculated by the CB-PWM, to reduce the computational time and to control the complexity of the system. The redundancies of the switching states are then used to balance the two dc-link capacitor voltages, similar to the SV-PWM-based strategy. The proposed scheme is capable of maintaining the difference between the two dc-link capacitor voltages for a wider range of machine speed-torque variations. Furthermore, a single carrier is used for PWM, instead of multiple carriers, which further reduces computational complexity. A detailed comparative study is carried out, to prove the performance difference between the low switching loss-based SV-PWM techniques, which is previously proposed by authors and the present proposed H-PWM strategy. In addition, total harmonic distortion of voltage and current (%THDv,i), duty cycles of the switches, total inverter power loss, as well as dc-link voltage balancing capabilities are also compared. The balancing ability of the proposed strategy by changing the neutral point potential control is also demonstrated. Detailed simulation and experimental studies are carried out to prove the performance of the proposed control strategy with a 6 kW, surface-mounted permanent magnet synchronous machine. Simulation and experimental test results prove the desired performance of the proposed scheme.


IEEE Transactions on Industry Applications | 2016

DC-Bus Voltage Balancing Algorithm for Three-Level Neutral-Point-Clamped (NPC) Traction Inverter Drive With Modified Virtual Space Vector

Abhijit Choudhury; Pragasen Pillay; Sheldon S. Williamson

A modified-virtual-space-vector-based dc-link voltage balancing strategy is proposed in this paper for a three-level inverter. In the proposed strategy, the summation of the three-phase currents for virtual vector needs not to be zero and it also keeps the two capacitor voltages balanced with wider range of load variations. The duty cycles for all the power switches are also derived in this paper using a nearest three-voltage vector scheme. Due to the reduced use of the medium voltage vectors, the proposed control strategy can considerably decrease the neutral-point voltage fluctuation for lower power-factor-based loads as well. Detailed simulation and experimental studies are also carried out to show the effectiveness of the proposed system with a dc-link voltage balancing strategy with permanent magnet synchronous machine. Voltage and current harmonic distortions are also presented with change in modulation index. A Dspace-based real-time operating system is used for real-time implementation with a 6.0-kW surface permanent magnet synchronous motor.


ieee international conference on power electronics drives and energy systems | 2014

A performance comparison study of space-vector and carrier-based PWM techniques for a 3-level neutral point clamped (NPC) traction inverter drive

Abhijit Choudhury; Pragasen Pillay; Sheldon S. Williamson

This paper presents a performance comparison study between the space-vector and carrier-based PWM techniques used for neutral point clamped (NPC) 3-level inverter. A reduced switching loss based modulation technique is used for the SVPWM scheme and a third harmonic injected PWM technique is used for the carrier-based PWM scheme. A 110 kW surface-PMSM is used with the NPC inverter, as generally being used for electric vehicle propulsion applications. Detailed simulation studies are carried out to show the performance comparison between the two modulation techniques for the total harmonic distortion, torque ripple, total inverter losses, conduction and switching losses for each power switches, their antiparallel diodes, and for the two NPC diodes. Simulation studies are carried out in MATLAB/ SIMULINK platform and the power switches are modeled in PLACES. A scaled down laboratory prototype with a 6.0 kW SPMSM and a 3-level NPC inverter is built to show the performance of the system with both control strategies.


conference of the industrial electronics society | 2013

Modified DC-link voltage balancing algorithm for a 3-level neutral point clamped (NPC) traction inverter based electric vehicle PMSM drive

Abhijit Choudhury; Pragasen Pillay; Sheldon S. Williamson

This paper presents a modified DC bus voltage balancing algorithm for a neutral-point clamped (NPC) three-level inverter based motor drives for permanent magnet synchronous machines (PMSM) used in electric vehicle applications. The topology used for DC bus voltage balancing is based on nearest three vectors (N3V) with a space vector pulse width modulation scheme (SV-PWM). In this scheme, the voltage space vectors are rearranged based on the four redundant small voltage vectors, to keep the two DC link capacitor voltages in their specific tolerance bands, even during fast transient conditions of the machine. This topology provides high stability and lower switching loss compared to the conventional N3V scheme. The performance of the proposed scheme is verified by simulation and hardware experimental tests.


IEEE Transactions on Industry Applications | 2016

Discontinuous Hybrid-PWM-Based DC-Link Voltage Balancing Algorithm for a Three-Level Neutral-Point-Clamped (NPC) Traction Inverter Drive

Abhijit Choudhury; Pragasen Pillay; Sheldon S. Williamson

This paper presents a hybrid pulse width modulation-based discontinuous modulation (D-HPWM) strategy with dc-link voltage balancing for a three-level neutral-point-clamped (NPC) traction inverter drive. The results are then compared with continuous-hybrid-PWM (C-HPWM) to check the performance improvement. The HPWM strategy uses both the advantages of carrier- and space-vector-based PWM strategies. The duty cycles are generated using the carrier-based strategy to reduce the computational time and complexity of the system and redundant vector states are used to keep the two dc-link capacitor voltages balanced. As discontinuous PWM (DPWM) reduces the switching losses considerably compared to the continuous PWM, the DPWM strategy is developed in this paper for the HPWM-based strategy. Detailed comparison studies are then carried out in MATLAB/Simulink and PLECS to show the conduction and switching loss distribution with change in modulation index for different power switches. A 54.0-kW surface permanent magnet synchronous machine (PMSM) is used for this simulation studies. Moreover, the total inverter loss and losses in each insulated gate bipolar transistor (IGBT) are also compared. Detailed experimental performance analysis is also carried out with a scaled down prototype of a 6.0-kW surface PMSM, NPC inverter, and real-time emulator DSpace, to show the capacitor voltage deviation with both control strategies.


IEEE Transactions on Industry Applications | 2016

Modified DC-Bus Voltage Balancing Algorithm for a Three-Level Neutral-Point-Clamped PMSM Inverter Drive With Reduced Common-Mode Voltage

Abhijit Choudhury; Pragasen Pillay; Sheldon S. Williamson

This paper presents an improved dc-link voltage balancing algorithm for a three-level neutral-point-clamped inverter by considering phase current direction. Detailed studies on the effects of change in load current direction on the dc-link capacitor voltages are presented. A maximum value of power factor is numerically derived, above which it affects the capacitor voltage balancing capability. Compared with the previously presented research work, the inputs to the space-vector pulsewidth-modulation block are the three phase currents and the difference between the two capacitor voltages. Depending on the states of the two dc-link capacitor voltages and phase current direction, redundant voltage vector sequences are selected. The selected vectors keep the capacitor voltage deviations within 5% of the total dc-link voltage. Two zero switching vectors (i.e., PPP and NNN) are also removed from all subsectors of the earlier proposed strategy, which one used to produce higher common-mode voltages. Detailed simulation and experimental results are presented in this paper for a 6.0-kW surface permanent-magnet synchronous machine. Both the simulation and experimental results show the required performance of the proposed system.


ieee transportation electrification conference and expo | 2014

Performance comparison study of two and three-level inverter for electric vehicle application

Abhijit Choudhury; Pragasen Pillay; M. Amar; Sheldon S. Williamson

A performance comparison study for a two- and three-level inverter based permanent magnet synchronous machine (PMSM) drive has been carried out. A novel space-vector pulse width modulation (SV-PWM) based DC-link voltage balancing algorithm is also presented, to drive the machine from three-level inverter. The proposed algorithm keeps the two DC-link capacitor voltages at their specific voltage tolerance level. Two-level inverter is also feed by space-vector based pulse width modulation (SV-PWM) technique. Total voltage harmonic distortion (THD), capacitor RMS current ripple (Icap), Conduction and switching losses for IGBT and diodes, torque ripple (Trpp) and DC-link capacitor voltage ripple (Vcaprip) are considered to perform the comparison study for both the inverters. Switching losses are calculated in PLECS environment using data sheet parameters from Infineon and control logics are developed in MATLAB/ Sim power system (SPS) tool box. For this study a 110.0 kW surface-PMSM is considered, which are mainly used for electric vehicle propulsion applications. A scaled down prototype is built in laboratory for both the inverters and tested with a 6.0 kW surface-PMSM. Both the simulation and experimental results show satisfactory performance of the proposed system.

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Sheldon S. Williamson

University of Ontario Institute of Technology

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