Abhrajit Ghosh

Runtime Attestation for IAAS Clouds.

We present the RIC (Runtime Attestation for Iaas Clouds) system which uses timing-based attestation to verify the integrity of a running Xen Hypervisor as well as the guest virtual machines running on top of it. As part of the RIC system we present a novel attestation technique which includes not only the guest operating system’s static code and read-only data sections but also the guest OS’ dynamically loadable kernel modules. These attestations are conducted periodically at run-time to provide a stronger guarantee of correctness than that offered by load-time verification techniques. A system such as RIC can be used in cloud computing scenarios to verify the environment in which the cloud services ultimately run. Furthermore we offer a method to decrease the performance impact that this process has on the virtual machines that run the cloud services since these services often have very strict performance and availability requirements. This scheme effectively extends the root of trust on the cloud machines from the Xen hypervisor upward to include the guest OS that runs within each virtual machine. This work represents an important step towards secure cloud computing platforms which can help cloud providers offer new services that require higher levels of security than are possible in cloud data centers today.

Designing Multiprocessor/Distributed Real-Time Systems Using the ASSERTS Toolkit

We describe a real-time software engineering toolkit called ASSERTS that provides complementary analysis and simulation capabilities to assist the designer of multiprocessor/distributed real-time systems. ASSERTS allows users to describe the parameters of the hardware platform, interconnection and the kernel, the programming model (shared or distributed memory) and the task system for the purpose of simulation and analysis. The simulation component of ASSERTS is quite detailed and features a number of built-in simulation models for practical real-time schedulers, interconnections as well as models of resource access protocols (such as priority inheritance and priority ceiling protocol). Users can describe the behavior of the tasks at various levels of abstraction using a fairly small set of about 20 macroinstructions for the purpose of simulation.