Adar A. Kalir

A near-optimal heuristic for the sequencing problem in multiple-batch flow-shops with small equal sublots

In this paper, we consider the lot-streaming problem of sequencing a set of batches, to be processed in equal sublots, in a flow-shop, so as to minimize makespan. A new heuristic procedure, called the bottleneck minimal idleness heuristic, is developed. Results of an experimental study are presented. It is shown that the proposed procedure generates solutions that are very close to the optimal solutions, and that the solutions generated are better than those obtained by using the fast insertion heuristic, considered to be a good heuristic for solving the flow-shop scheduling problem, when applied to the problem on hand.

Evaluation of the potential benefits of lot streaming in flow-shop systems

Abstract Lot streaming is the process of splitting a production lot into sublots, and then scheduling the sublots in overlapping fashion on the machines, in order to improve the overall performance of the production system. Simulation-based and industry-based reports have confirmed that substantial benefits are possible via lot streaming. In this paper, we present, for the first time, analytical results pertaining to the potential benefits of lot streaming in flow-shop systems. The results are developed using three common performance measures. These measures are (a) lakespan (i.e., the total completion time of all the lots), (b) mean flow time, and (c) average WIP level. For each, an expression of the ratio of the measure under lot streaming to the measure without lot streaming is developed. These expressions can be used to evaluate the benefits of lot streaming under certain operating conditions. It is further shown that, in special extreme cases, these expressions purely depend upon the problem parameters (i.e., the number of machines, the number of lots, the lot-sizes, etc.)

Constructing Near Optimal Schedules for the Flow-Shop Lot Streaming Problem with Sublot-Attached Setups

Lot streaming—the process of splitting a production lot into sublots—has been a common practice in flow-shop systems during the past decade. Nevertheless, a major limiting assumption has been made in the analysis of these systems in that the setup time is, at most, lot-attached but not sublot-attached. In this paper, we consider the single and multiple batch flow-shop lot-streaming problems with sublot-attached setup times. A fast, optimal solution algorithm for the single batch problem is presented. For the multiple batch problem, we propose a near optimal solution procedure which is optimal in two-machine flow-shops. Computational results are also presented for the multiple batch problem which indicate both the efficiency and effectiveness of this procedure.

Optimal Solutions for the Single Batch, Flow Shop, Lot‐streaming Problem with Equal Sublots

Lot streaming is the process of splitting a production lot into sublots and then scheduling the sublots in overlapping fashion on the machines in order to improve the performance of the production system. Implementation of this concept arises in several batch production environments. These include, among others, printed circuit board assembly and semiconductor fabrication. There are several limitations in the lot-streaming models available in the literature which affect their usefulness in reality. In this paper, we consider the single batch, flow shop, lot-streaming problem but relax several of these limitations. The main contribution of this paper is to provide the production manager with a way of splitting a lot in order to optimize performance under various measures of performance and setup time considerations. In addition, the insight of the proposed procedure can be used to tackle more general versions of the problem considered.

Segregating Preventive Maintenance Work for Cycle Time Optimization

Preventive maintenance (PM) plays an essential role in keeping the equipment in control and performing in the long term in semiconductor manufacturing. However, the impact of this activity on the cycle time of a specific toolset or even the entire fab can be detrimental. Hence, there is a strong incentive for determining the best way to carry out the required PM work content so as to optimize cycle time. In this paper, a model is proposed that optimizes the number and frequency of PMs for a predetermined PM work content, with the consideration of attached setups.

Mean cycle time optimization in semiconductor tool sets via PM planning with different cycles: a G/G/m queueing and nonlinear programming approach

In semiconductor manufacturing, preventive maintenance (PM) activities are typically scheduled via a two tier hierarchical decomposition approach. The first decision tier determines a PM cycle plan while the second tier schedules these planned events into the manufacturing operations. Following recent work based on the use of G/G/m queueing approximations for PM planning, we develop a method to allow for multiple PM cycles in a tool set. We formulate a nonlinear program with the PM cycle durations as continuous decision variables with the objective of minimizing the mean cycle time. We examine certain special cases and characterize the optimal solutions. Numerical studies are conducted with realistic multiple PM cycle data to assess the implications of the proposed approach. The results suggest that it may be possible to obtain significant improvements in the overall cycle time performance of tool sets in semiconductor manufacturing relative to existing PM planning procedures.

The role of advanced start and dominance rules in simulated annealing for parallel processor scheduling problems

Simulated annealing (SA) has been widely used to solve hard combinatorial optimization problems during the last decade. The application of SA requires the initialization of certain parameters and an initial solution to start the search with. An emphasis in the application of SA has been on the determination of the best initial values of the parameters, however, the starting solution has traditionally been randomly generated. In this paper, we study the effects of the quality of the starting solution and the use of dominance rules on the performance of SA. We show that the better the initial solution used by the SA, the better the final solution produced by it, i.e. the level of improvement achieved by the SA is dependent on the quality of the initial solution. This is demonstrated using various parallel processor scheduling problems. We have also found that dominance rules (applied in conjunction with SA) may in some cases lead to further improved solutions, but their inclusion in an SA scheme must be det...

Production Planning and WIP Assignment for Wafer Fabrication Tools With Availability Constraints

This paper deals with a short-term production plan of a single toolset during a shift at a semiconductor fabrication plant. We propose a cost-based optimization model that seeks to minimize the cost of the shift while meeting the following conditions: 1) the shift produces its required output, measured in work-in-process (WIP) levels; 2) preventive maintenance (PM) tasks are carried out in compliance with the manufacturers recommended PM policy; and 3) the equipment undergoes cleaning operations, as recommended by the manufacturer, in a way that minimizes the production of blank wafers (a by-product of the cleaning process). A linear programming model is formulated and a practical procedure is provided to solve this production plan problem. Data from a real fab are used to demonstrate the optimality and applicability of the proposed approach. Results of various sensitivity analyzes further demonstrate how the model can be used to analyze the impact of changes in cost parameters, WIP levels and production rate parameters on the optimal solution.

A full factory transient simulation model for the analysis of expected performance in a transition period

Intels Fab-18 is based in Israel, and has transitioned from producing 0.18-micron logic devices to producing 90 nM flash products. During this transition period, the factory has de-ramped in volume of logic while ramping-up flash. AutoSched AP software was utilized for the development of a transient simulation model of the Fabs behavior during this period. It is the first attempt, at Intel, to utilize a full factory simulation in order to analyze and support decisions that pertain to a transient period of parallel de-ramp and ramp-up of technologies. Unlike typical simulation models for the analysis of factory performance and behavior in steady-state, the transient model poses several modeling challenges and requires major adjustments in dealing with these challenges. In this paper, we discuss those aspects. The benefits and contribution of such a model to decision making and the improvement of factory performance are also presented

Achieving Reduced Production Cycle Times Via Effective Control of Key Factors of the P-K Equation

In the current environment of flash semiconductor market, competitive cycle times are the key to success. Cycle time (CT) reduction can be achieved by process time elimination and equipment performance improvement, but also by optimized WIP management policy. In this paper, we discuss how significant CT reductions are attained via the effective change of parameter values of the governing WIP management policy of a semiconductor factory. A full factorial design of experiments (DOE) was performed, and several parameters were examined. The impact on the coefficient of variability of departure rate (CDR) and CT was evaluated. Results have clearly shown that by changing the values of these parameters, significant cycle time reductions of up to 13% can be achieved