Adlai H. Smith

A simulation performance framework using in situ metrology

Modern lithographic simulation engines1 are quite capable of determining the detrimental impact of source and lens aberrations on low k1 lithographic metrics - given the proper input2. Circuit designers, lithographic engineers, and manufacturing facilities would seem to be the beneficiaries of the predictive power of lithographic simulators; however, in-situ methods for accurately determining lens aberrations and source metrology maps have only rather recently been accepted3 and integrated into practice4. For this work, we introduce several new methods for characterizing scanner performance including a high accuracy source metrology tool and integrated simulation engine5. We focus attention on the combined detrimental effects of lens aberrations, source non-ideality, distortion, synchronization error, and transmission error on deep sub-wavelength lithographic metrics such as: H-V bias, feature-shift, and ΔCD. After a brief theoretical discussion, we describe a matrix of simulation case studies and present results. Finally, we discuss potential applications for the simulation performance framework and its potential impact to industry.

Measurement, separation, and amelioration of transverse scanning synchronization error

The need for lithographic tool advances for reducing feature size, pitch (low k1 processing), and improving overlay stems directly from next generation circuit layout and performance roadmaps1. Overlay error or layer-to-layer misalignment tolerances have continued to decrease to the point where a few nanometers of misalignment can seriously impact process and device yields. In this work, we expand our previous work2 and introduce a new scanner aberration monitoring methodology that can both measure and deconvolve lens distortion from scanning synchronization error while simultaneously providing machine corrections for accurate tool matching. Experimental data taken from several machines suggests it is possible to ameliorate scanning synchronization error for each machine and improve tool-to-tool matching at the level required for next generation processing. Finally, we discuss applications of this new technology including practical fab implementation and discovering problematic scanning tool signatures.