Adrian Burian

Complex-valued QR decomposition implementation for MIMO receivers

Multiple input multiple output (MIMO) transmission is an emerging technique targeted at 3G long term evolution (LTE) systems. One vital baseband function in MIMO receivers is QR decomposition of the channel matrix. In this paper, a processor based complex-valued QR decomposition is presented. The processor is enhanced with complex arithmetic and inverse square root function units. The proposed processor fits well with the real-time requirements of the MIMO receiver. The computing power is tailored for typical MIMO systems. Due to the generality of the applied computing resources it can also be used for other tasks. Also, the presented principles can be applied on any customizable processor architectures to accelerate QR decomposition.

A fixed-point implementation of matrix inversion using Cholesky decomposition

Fixed-point simulation results are used for the performance measure of inverting matrices using the Cholesky decomposition. The working space is reduced significantly by grouping signals using hardware sharing and a variable position of the radix point. The hardware cost of the functional units is reduced by 25% when compared to floating-point.

Tuning the smoothness of the recursive median filter

The median filter is a special case of nonlinear filters used for smoothing signals. Since the output of the median filter is always one of the input samples, it is conceivable that certain signals could pass through the median filter unaltered. These signals define the signature of a filter and are referred to as root signals. Median filters are known to possess the convergence property, meaning that by repeating median filtering a root signal will be found, starting from any input signal. By associating the nonlinear operation of median filtering with a two terms cost function, an optimization process that minimizes that function is obtained. Cost functions of the same type are associated with different recursive median filtering schemes by replacing the actual values inside the filters window with the original signal. The convergence behavior of these filters and their smoothness are studied. By changing the positions of the replacements during filtering, a tuning effect of the smoothness is obtained. Simulation results show that the proposed filtering schemes provide improved performance over the standard recursive median filter, succeeding in preserving. small details and fine textures.

High dynamic range imaging on mobile devices

Natural scenes usually produce radiance maps that have a dynamic range much larger than the dynamic range of the imaging sensors. Due to this fact the captured images, almost always, contain under-exposed and saturated regions. Among several solutions, proposed in the open literature, the multi-frame approaches have been shown to produce high quality results by combining several shots of the same scene, captured at different exposure times. Here we introduce a low complexity multi-frame approach suitable for mobile implementations. We have implemented our method in Symbian OS in a Nokia cameraphone and the results obtained with our proposed system are shown in the paper.

Several approaches to fixed-point implementation of matrix inversion

Matrix inversion is a general problem in a wide variety of applications. The problem becomes even more challenging when an efficient hardware implementation is required. In this paper, three matrix inversion implementations in fixed-point are presented and compared. The fixed-point implementation of such methods is considered and the needed processing elements are introduced. The characteristics of each approach are described and their hardware implementations are compared.

DSP implementation of Cholesky decomposition

Both the matrix inversion and solving a set of linear equations can be computed with the aid of the Cholesky decomposition. In this paper, the Cholesky decomposition is mapped to the typical resources of digital signal processors (DSP) and our implementation applies a novel way of computing the fixed-point inverse square root function. The presented principles result in savings in the number of clock cycles. As a result, the Cholesky decomposition can be incorporated in applications such as 3G channel estimator where short execution time is crucial

Updating matrix inverse in fixed-point representation: direct versus iterative methods

The VLSI implementations of digital signal processing algorithms gain huge performance improvements if fixed-point arithmetic is being used. Inspired by the fact, fixed-point algorithms for both direct and iterative methods to update the inverse of a matrix were implemented and compared. Also, an algorithm to approximate an overdetermined system for an efficient and fast implementation of the Sherman-Morrison formula is proposed.

Direct versus iterative methods for fixed-point implementation of matrix inversion

Fixed-point simulation results are used for performance measure of inverting matrices using direct and iterative methods. As direct method the Cholesky decomposition is being used. For the iterative counterpart, the Newtons iteration has been implemented. The fixed-point implementation of matrix inversion is tested and analyzed for both cases. We compare our solutions by using some numerical examples.

Image Pre-Processing for Bar Code Detection in Mobile Devices

In this paper we present an image pre-processing procedure for bar code detection in mobile devices. The goal of our method is to improve the quality of the input image, thus making bar code detection and decoding possible even in difficult situations. The implementation details and the results obtained with the proposed method on real images taken with a camera phone, are discussed

VLSI-efficient implementation of full adder-based median filter

A new VLSI-suitable hardware implementation of the median filter that uses full adders (FAs) as the basic building block is introduced. The proposed hardware structures consist of several stages that exhibit regular and modular structure. It also reduces the hardware requirements and has a faster processing speed, when compared with some other existing hardware implementations. A general methodology for designing full adder-based median filters is also developed.